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  1. K

    Discussion RDNA4 + CDNA3 Architectures Thread

    No, that has been done for a while.
  2. K

    Discussion RDNA4 + CDNA3 Architectures Thread

    They did move a lot of engineers over to MI series chasing that AI money. But still this doesn't look good.
  3. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    He's going to retcon it and say his sources meant Skymont.
  4. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Are you suggesting that I intentionally overhyped Zen5? Are you brain damaged?
  5. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Not an MLID slide. I was the one that convinced Adored not to do a video on it, because the IPC number was lower than expected. My fault for accidentally giving MLID more credibility.
  6. K

    Discussion RDNA4 + CDNA3 Architectures Thread

    It's not that ROPs/TMUs use a lot of energy, but that they weren't (properly) designed for 3GHz+ clock speeds. So they end up bottlenecking the whole GPU.
  7. K

    Discussion RDNA4 + CDNA3 Architectures Thread

    Stuff like ROPs/TMUs are not used in Compute.
  8. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Another classic "guess every possibility so you can't miss" from MLID. Here he was just two months ago saying Turin-Dense launches in September:
  9. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Yeah that one is not 30% IPC. Just saying that you shouldn't quote MLID because he will try to retcon he was talking about 30%+ IPC gain for Skymont the whole time.
  10. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Lunar Lake is not Royal Core, and MLID was talking about LNC not Skymont.
  11. K

    Discussion RDNA4 + CDNA3 Architectures Thread

    There were some issues with OREO but it wasn't disabled. Scalar FPU was never part of RDNA3.
  12. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    How is the MT perf increase so much higher than ST perf increase? A puny 8MB System Level Cache is not going to result in 70% higher performance.
  13. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Yeah that's not an L3 cache.
  14. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Because they are? All the leaked diagrams showed them without access to the L3 cache and call the 4x SKT cluster "LP island".
  15. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    For the MT comparison it's 4x Skymont in LNL vs 2x Crestmont LP in MTL.
  16. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Israel Design Center, the guys who have been doing P-core design for many years. If Skymont is indeed +38% INT and +68% FP IPC, it's gonna end up within 10-20% IPC of Lion Cove, at less than half the area and power. There is no point in continuing with P-cores if they can just scale up E-cores...
  17. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    IDC in absolute shambles. Almost guaranteed we get Conroe 2.0 in a few years.
  18. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    The actual chipset (Promontory21) is unchanged. 800-series motherboards will just be a rebrand of 600-series, like 300-series to 400-series.
  19. K

    Discussion NV Re-Enter ARM PC market in 2025!

    Whynotboth.jpg
  20. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Skymont is same area as Gracemont despite 2 node shrinks. So a lot more transistors.
  21. K

    Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

    Looks similar to previous schizo diagram by @AMDK11
  22. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Tenstorrent CPU team is mostly ex-AMD people, including many that worked on Zen5.
  23. K

    Question Zen 6 Speculation Thread

    They aren't.
  24. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    CPU-Z benefits from FP latency/throughput and big schedulers/reorder buffers, which are greatly improved with Zen5. Therefore I would expect CPU-Z IPC increase to be quite large.
  25. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    It's a terrible benchmark but AFAIK CPU-Z should be a much bigger uplift on Zen5. Also there are no IF/IMC changes so I'm skeptical of this post.
  26. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Same situation as Zen3. The fun stuff is the new core.
  27. K

    Discussion Qualcomm Snapdragon Thread

    Emulated x86 vs native Zen5 comparisons are going to be hilarious.
  28. K

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    There is no logic or reason, AMD marketing just makes stuff up as they go.
  29. K

    Info LPDDR6 @ Q3-2024: Mother of All CPU Upgrades

    MSFT wants to push WoA with multiple vendors.
  30. K

    News NV 1Q24 Results

    NVIDIA added 1.5 Intels or 0.74 AMDs to its market cap in just 2 minutes
  31. K

    Discussion RDNA4 + CDNA3 Architectures Thread

    Unless "The Latest Thing" is superior DX12/Vulkan performance, FP16 or real Async Compute hardware. Then it doesn't matter :p
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