- Sep 18, 2011
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I think this might as well get its own discrete thread.
Refresher;
-> 7nm @ TSMC / 2020 high volume production
-> DDR5 / PCIe 4.0
-> Competitive to Zen/Dhyana (US-sources)
The new info from an interview;
Wang Weilin's 2019 goal is clear, "complete the development of the next generation of 7nm validation chips ..."
^-- Chief Engineer at Zhaoxin. // https://www.chainnews.com/articles/158019324090.htm -- https://translate.google.com/transl...ews.com/articles/158019324090.htm&prev=search
Refresher;
-> 7nm @ TSMC / 2020 high volume production
-> DDR5 / PCIe 4.0
-> Competitive to Zen/Dhyana (US-sources)
The new info from an interview;
Wang Weilin's 2019 goal is clear, "complete the development of the next generation of 7nm validation chips ..."
^-- Chief Engineer at Zhaoxin. // https://www.chainnews.com/articles/158019324090.htm -- https://translate.google.com/transl...ews.com/articles/158019324090.htm&prev=search
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