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T
Tuna-Fish
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T
Tuna-Fish
replied to the thread
Discussion
RDNA4 + CDNA3 Architectures Thread
.
No, he has in the past changed the benchmark setup on every AMD release to make sure AMD scores lower. His benchmark numbers are...
Monday at 2:13 PM
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
... Do you think they only start the production of the regular chips after a month of twiddling their thumbs? None of the timelines...
May 1, 2025
T
Tuna-Fish
replied to the thread
Discussion
RDNA4 + CDNA3 Architectures Thread
.
Why would you imagine that a 12GB model can be priced lower than the 8GB one?
Apr 27, 2025
T
Tuna-Fish
replied to the thread
Question
Intel's future after Pat Gelsinger
.
6+ layers of middle management?
Apr 25, 2025
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
Note that starting with Zen5, the TSVs don't go on the CCD. The CCD is face down on top of the cache chiplet, so no holes need to be...
Apr 17, 2025
T
Tuna-Fish
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
Once they get a PCH that can do 5.0 for the uplink that will probably be fine for a while.
Apr 15, 2025
T
Tuna-Fish
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
No. Because AMD cannot spend more money today to have more chiplets with 3D cache. The lead time for increasing capacity is measured in...
Apr 15, 2025
T
Tuna-Fish
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
The integration capacity is still limited. AMD keeps buying more capacity every generation, but it's slow to build. They cannot put...
Apr 13, 2025
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
There is no engineering effort to gut the FPU, AMD has already designed it to be configurable. You just pick whether you want 256-bit or...
Mar 29, 2025
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
To be clear, it will still run 512-bit code, just at half rate. And using 512-bit registers is still a win, because it means frontend...
Mar 28, 2025
T
Tuna-Fish
replied to the thread
Discussion
RDNA4 + CDNA3 Architectures Thread
.
Isn't 60-series most of the market? I think 200k upper midrange GPUs is not little.
Mar 26, 2025
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
They really don't need that. 8xZ6c as a single CCX is already an absolutely massive upgrade over PS5, and I frankly think that the...
Mar 24, 2025
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
Sparse or not? Because 8CU is 40TOPs FP16 sparse also 40TOPs of INT8 not sparse.
Mar 21, 2025
T
Tuna-Fish
replied to the thread
Question
Zen 6 Speculation Thread
.
I think I know why it's that big. The MS requirement for the copilot+ sticker is 40 tops of sparse fp16, right? 8 CU of RDNA4 hits that...
Mar 21, 2025
T
Tuna-Fish
replied to the thread
Discussion
RDNA4 + CDNA3 Architectures Thread
.
Yes, but among people not you there is variability in temperatures, power supply and silicon quality. All of that influences stability...
Mar 21, 2025
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