Recent content by OneEng

  1. O

    Barcelona 'openssl speed' benchmarks

    That SSL bench was a good find. I believe that K8 also performed better in SSL vs non-secure HTTP applications. It still was bested by Core 2 in IPC, but it was much closer with the SSL benchmarks. I think that this must imply some amount of FPU dependence in the SSL benchmark. I don't...
  2. O

    AMD Barcelona Thoughts/Questions

    No. I don't think so. The server versions will get an IMC the desktop versions will still have a north bridge. This is the best of both worlds for Intel. They get all the performance advantages in the server world, and still get to charge for both a CPU and a North Bridge chip in the...
  3. O

    AMD Barcelona Thoughts/Questions

    I think that Intel would gain very little performance (lower latency) by moving away from FBDimms, but would lose a great deal of power consumption. They would lose the ability to hold lots of memory which would hurt them (in performance) in database servers tremendously. As for AMD's...
  4. O

    AMD Barcelona Thoughts/Questions

    coldpower27, That is a big part of it, but the IMC also makes a difference. The "other" stuff catagory on the Intel system includes their North Bridge which is likely eating some power as well. That being said, I think that Intel would re-gain the performance/watt crown if they abandoned...
  5. O

    AMD Barcelona Thoughts/Questions

    Phynaz, It is 25% faster clock for clock, but here is the link: From here: http://www.techreport.com/articles.x/13224/4 If you look at the SPECjbb2005 scores, you can derive the 25% IPC. The 2.5Ghz K10 lands right between the 3.0Ghz Clovertown and the 3.0Ghz Penryn. Not bad for a...
  6. O

    AMD Barcelona Thoughts/Questions

    TechReport has a new article up here: http://techreport.com/articles.x/13224 In application server benchmarks, a 2.5Ghz K10 is faster than a 3.0Ghz Clovertown and only 4% slower than the 3.0Ghz Penryn (if you look at the 4 warehouse score it actually equals it). In application server...
  7. O

    AMD prepares three-core processors

    coldpower27, Very good point. While AMD did in fact scale this far, it took forever ..... something they do not have today ;) And yes, I am sure that Power6's architecture is a major factor in its scaling. I was aiming to head off the argument that AMD's SOI process is the fiend holding...
  8. O

    AMD prepares three-core processors

    A tri core processor actually makes a great deal of sense. AMD could either throw them away ...... or sell them as tri-cores when one core doesn't operate. There is little doubt that a tri-core K10 processor, even at 2.5Ghz, would beat a 2.93Ghz dual core Core 2 in highly threaded...
  9. O

    AMD Barcelona Thoughts/Questions

    On the question of why AMD chose to use an L3 cache: The L3 (unlike the L2) is a semi-exclusive "victim" cache and is shared. This is nearly exclusively a multi-threaded advantage. For single threaded applications, a larger L2 would have been much better. The L3 being shared allows the...
  10. O

    ClawHammer in October?

    I have to agree with Anand here. It is very likely that K8 will be announced in November; however, I suspect there will be bunches availible at launch and that AMD will stockpile in anticipation of demand. Some of that demand will be mine :) As soon as they are availible, a Clawhammer system...
  11. O

    Tbird 1.4 vs. XP 1500

    AthlonXP has a gadget called "hardware prefetch" which anticipates what it will need from memory and gets it ahead of time. This effectively speeds everything it does up by having more info ready for the processor when it needs it. The real biggie is that AthlonXP supports Intel's SSE...
  12. O

    Who are you guys?

    35 years old, US Nuclear Submarine Service (1983-1989), BSEE University of Illinois 1993, Ford Motor Company end of line system test design engineer, Currently director of development for a product called the "Visual Authoring Tool" used for codeless development of embedded...
  13. O

    P4's future is looking GOOD to me.

    P4's future looks pretty bleak to me. Here is my rationale: First let me address RAMBUS memory. Serial memory while having lower pin count has much much higher latency (bad bad bad). If this isn't bad enough, it must also run at higher frequencies makeing it consume more power, run hotter...
  14. O

    DDR: At THAT price?

    RDRAM was 10 TIMES THE COST OF SDRAM when it came out! DDR is simply experiencing a little profit taking by the RAM manufacturers since they are getting squeezed so hard on SDRAM right now. RDRAM is inhearently more expensive to produce than SDRAM and will NEVER be equal in production cost to...
  15. O

    AMD Announces Mobile AMD Duron Processor

    I haven't done any research, but why on earth would the MOBILE Duron need 1.6V when the DESTOP ONLY NEEDS 1.5V?. Additionally, the Duron being used for the mobile market is just a Duron. It is not the Morgan and does not have PowerNow. It is nice to see AMD finally get a serious contender...
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