Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

Golden Member
Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.




Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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Doug S

Diamond Member
Feb 8, 2020
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That is a massive bombshell. How's Intel stock doing today? This is the worst single Intel news event I can remember for years.

Trump hates the CHIPS Act because he wasn't responsible for it. He will replace it with something nearly identical that he can take credit for. Sort of like what he did with NAFTA, replacing it with the nearly identical USMCA (which he has recently been lashing out against, I guess forgetting that he's only got himself to blame for its shortcomings)

So I wouldn't worry about Intel getting CHIPS Act funding. For TSMC and Samsung, or for lower profile US companies providing "supply chain" pieces rather than chips who were depending on the money, that's another matter. They should probably worry whether those commitments will stand.
 

dr1337

Senior member
May 25, 2020
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I personally fail to see how nearly 500 probational employees from the NIST even remotely relate to the handing out of grant money from a bill passed in 2022.

Don't be gullible guys, it's a politically tense time and people are trying to farm clicks and outrage right now.
 

mikk

Diamond Member
May 15, 2012
4,287
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Yep, finally we are getting external rumors about IFS 18A's yield which is 20-30% for PTL's compute tile with 4+8+4. You would think with Intel separating CPU tile from GPU (LNL @ N3B), IFS should be able to mass producing PTL's CPU tile easily and yet the yield is 20-30%.

Of course, the quote is not from Intel but I rather believe Ming Chi Kuo than Intel's BS marketing talk....We will definitely hear more from other OEMs in the future...


From OEMs? You think Intel is telling OEMs the current yield of an upcoming chip? I never heard of this.
 
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OneEng2

Senior member
Sep 19, 2022
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From OEMs? You think Intel is telling OEMs the current yield of an upcoming chip? I never heard of this.
I think it is actually positive news.

The last time they said this, we found out that the "Yield" was calculated on a die very close to the Reticle limit .... and the number was about 10% then. Intel later actually published the number 0.2 defects/cm2 which I believe gave you about 60% on a die about 100mm2.

If this is the same BS as last time, then the Nova Lake die is currently yielding at around 75%.

It's all crap anyway. Just because the chip can run at SOME frequency doesn't mean everything is rosy. We will know for sure soon enough.
 

511

Golden Member
Jul 12, 2024
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I think it is actually positive news.

The last time they said this, we found out that the "Yield" was calculated on a die very close to the Reticle limit .... and the number was about 10% then. Intel later actually published the number 0.2 defects/cm2 which I believe gave you about 60% on a die about 100mm2.
It was 0.4 0.2 translates to about 75 ish percent for the PTL Di.
If this is the same BS as last time, then the Nova Lake die is currently yielding at around 75%.

It's all crap anyway. Just because the chip can run at SOME frequency doesn't mean everything is rosy. We will know for sure soon enough.
OEM can judge the quality of test chips though.

Arrow Lake borked sample with only Chadmont working anyone remember that.🤣
 
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511

Golden Member
Jul 12, 2024
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IMO Economic High-Na will be the next foundry battle like EUV was whoever commercializes EUV won previous battle (TSMC) this time it will be High-Na just a guess.

Intel has compared RWC+ to RPC in EMR of the same core count and maybe the process is carrying them hard( Intel 3 has dramatic leakage improvement vs Previous Intel nodes so it's not surprising).

 

511

Golden Member
Jul 12, 2024
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Imagine killing Golden egg laying hen
After asking some long time Intel folks I know I can offer three reasons that Intel R&D died under Sohail.

First, he did not demand robust processes. He was quite happy to accept a process that was held together with human glue provided by constant attention of process engineers. All that mattered is that it worked, the cost in human capital was irrelevant. This resulted in tight process windows and little time to spend on process improvement.

Second, he became a bottleneck in the development process. The story I was told is that there were so many process changes going on at once that there was very little baseline material in the factory to compare the results of the experiments against. Sohail's solution was to limit the number of changes that were allowed to run in the factory at any one time. He did this by keeping a list and reviewing each suggestion personally. If an idea didn't make the cut it didn't get on the list and didn't get run. I don't care who you are no one can be an expert in all areas of the fab. It is just too complex.

Third and I think the most important. He created an environment of fear in which people were afraid to share bad news. Everything got sugarcoated and issues were hidden. That is the kiss of death in any development process.
Source
 

Hitman928

Diamond Member
Apr 15, 2012
6,615
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Columbus Dispatch reporting that Intel's new Ohio fab is delayed again. Not expected to open until at least 2030 as the additional fab capacity will not be needed. This raises the question as to what happens with the $300M grant given to Intel by Ohio to build the fab as the grant had a requirement that the fab be completed by 2028.

 

511

Golden Member
Jul 12, 2024
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Columbus Dispatch reporting that Intel's new Ohio fab is delayed again. Not expected to open until at least 2030 as the additional fab capacity will not be needed. This raises the question as to what happens with the $300M grant given to Intel by Ohio to build the fab as the grant had a requirement that the fab be completed by 2028.

Probably had to give it back but they don't have anyone buying ohio capacity and they don't have the financial to build it as of now so idk what's going to happen.
It may be a bargain they want more money like tsmc delayed the fab or Intel did new Mexico.
 

DrMrLordX

Lifer
Apr 27, 2000
22,533
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Columbus Dispatch reporting that Intel's new Ohio fab is delayed again. Not expected to open until at least 2030 as the additional fab capacity will not be needed. This raises the question as to what happens with the $300M grant given to Intel by Ohio to build the fab as the grant had a requirement that the fab be completed by 2028.


Which works better here? Stupid Ohio Gen Alpha references, or maybe "of course Intel will send the money to Wisconsin to help Foxconn finish their factory there"?
 

OneEng2

Senior member
Sep 19, 2022
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IMO Economic High-Na will be the next foundry battle like EUV was whoever commercializes EUV won previous battle (TSMC) this time it will be High-Na just a guess.
I agree. High NA will allow smaller traces and thus higher density transistors. It is the first fundamental improvement since EUV.

Intel botched the uptake of EUV. I wonder if they are jumping the gun on High NA this time around?

Still, early reports look good .... but then, it isn't like we get unfiltered information so I am sure there are plenty of challenges Intel is having that we DON'T hear about.

If they can get High NA up before TSMC and get good yields from it, there could be an Intel revival .... at least for a few years.
 
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jdubs03

Golden Member
Oct 1, 2013
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Interesting article. Though this part isn’t great:
The 18A process was already delayed to 2026 for potential contract manufacturing customers. Now, according to supplier documents reviewed by Reuters and two sources familiar with the matter, Intel has pushed back its timeline another six months.

The delay is due to the need to qualify crucial intellectual property for the 18A process, which is taking longer than anticipated. Without the qualified fundamental building blocks of intellectual property that small and mid-size chip designers rely on, a swath of potential customers would be unable to produce chips on 18A until at least mid-2026, according to the two sources and documents.

It is unclear why the intellectual property qualification has been delayed. Qualifying intellectual property includes a guarantee from the supplier that it will work on a given manufacturing process.
Not as bad but:
Intel's 18A process currently performs at a level between TSMC's most advanced process and its predecessor, Sassine Ghazi, CEO of Synopsys, said in an interview after its financial results. Synopsys supplies some of the crucial intellectual property needed for Intel's foundry.
So basically N3P performance, it seems. Not as much as I expected unfortunately.
 

511

Golden Member
Jul 12, 2024
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Interesting article. Though this part isn’t great:
Yes that's why I posted it 🙂
Not as bad but:
This is just made up tbf. They always said customer tape out was in H1 25 so how do you go from tape out to actual product in 6 months? It takes 9 minimum if everything is right so it is made up delay by rumors
So basically N3P performance, it seems. Not as much as I expected unfortunately.
I think we are misinterpreting if he said this in Q4 Call it would mean between N3E and N2. He ofc knows the answer but doesn't want to say it
 
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Hitman928

Diamond Member
Apr 15, 2012
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This is just made up tbf. They always said customer tape out was in H1 25 so how do you go from tape out to actual product in 6 months? It takes 9 minimum if everything is right so it is made up delay by rumors

This is about catalog/3rd party IP not being validated on the process in time which means the vast majority of customers with larger designs won't tape out until 2H26 (if the reporting is true) at the earliest, which means there's a good chance that there won't be any major external products on 18a until 2027. Even big companies typically use at least some catalog IP to complete their designs. They don't design every last circuit in house but will use things like PLLs, data converters, etc. that are available from others (such as Synopsys). If those things aren't validated until mid or 2H of 2026, customers will have to wait until at least that time to tape out their own designs.
 

511

Golden Member
Jul 12, 2024
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This is about catalog/3rd party IP not being validated on the process in time which means the vast majority of customers with larger designs won't tape out until 2H26 (if the reporting is true) at the earliest, which means there's a good chance that there won't be any major external products on 18a until 2027. Even big companies typically use at least some catalog IP to complete their designs. They don't design every last circuit in house but will use things like PLLs, data converters, etc. that are available from others (such as Synopsys). If those things aren't validated until mid or 2H of 2026, customers will have to wait until at least that time to tape out their own designs.
For this part even Intel uses those things.You mean to tell me Intel designs CPU without those things it must be some specific IPs they want not basic blocks but some unique blocks and it's returns they are good at mixing truth with made up things.
 
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Hitman928

Diamond Member
Apr 15, 2012
6,615
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For this part even Intel uses those things.You mean to tell me Intel designs CPU without those things it must be some specific IPs they want not basic blocks but some unique blocks and it's returns they are good at mixing truth with made up things

Intel has traditionally always used internally developed IP. Their use of 3rd party IP on Intel nodes was extremely limited because they didn't even use the same development tools as the rest of the industry so 3rd party IP developers weren't designing anything for Intel nodes. They have had a pretty limited partnership with a couple of outside developers in the past, but the IP developed was for Intel use only as it only worked with Intel tools and was heavily customized for Intel's purposes. Intel's products on 18a are still using Intel tools for development, AFAIK, and the 3rd party tools were still in development at least as late as fall of last year, not sure if they are fully ready yet or not.

Like I said, my post was assuming the report was true, which I have no idea if it is or not, but it is certainly feasible in terms of how how Intel has operated up to this point, the seeming lack of any major customer products yet announced for 18a, and Intel themselves saying they don't expect any major external foundry revenue until 2027.
 

511

Golden Member
Jul 12, 2024
1,897
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Intel has traditionally always used internally developed IP. Their use of 3rd party IP on Intel nodes was extremely limited because they didn't even use the same development tools as the rest of the industry so 3rd party IP developers weren't designing anything for Intel nodes. They have had a pretty limited partnership with a couple of outside developers in the past, but the IP developed was for Intel use only as it only worked with Intel tools and was heavily customized for Intel's purposes.
Yeah but they have migrated away from custom tools so their IP as well ?
Like I said, my post was assuming the report was true, which I have no idea if it is or not, but it is certainly feasible in terms of how how Intel has operated up to this point, the seeming lack of any major customer products yet announced for 18a, and Intel themselves saying they don't expect any major external foundry revenue until 2027.
Got it
 
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