Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

Abwx · Apr 22, 2025

511 said:
LOL AMD has copied almost everything what Intel does while the opposite is not true in terms of ISA only exception being X86_64 Extension.

SSE was just Intel s version of 3DNow, albeit not as efficient as AMD s ISA, Atom kept some instructions from 3DNow wich had no equivalent within SSE.

Beside AMD was the first to implement FMA.

511 · Apr 22, 2025

Markfw said:
Except AMD does not down-clock on a full avx-512 implementation (Zen 5) like Intel did and does on AVX now.

Even Intel doesn't downclock on AVX-512 since Golden Cove that's a early implementation issues AMD had way more time than Intel to figure out and live off of Intel's efforts.

I wish AMD could do this with CUDA.

511 · Apr 22, 2025

fastandfurious6 said:
yeah this is intel's #1 issue right now. they just sold off Altera with 50% loss of investment for quick $4b cash injection. they threw TONS of money the last years trying to aggressively keep up, had to go TSMC as well

Krzanich did immeasurable damage lmao. is there like a full list of his decisions?

Dude should get an award for destroying world's Number 1 fab and design business.

inquiss · Apr 22, 2025

Fjodor2001 said:
Now you know:

Intel "Nova Lake-S" CPUs to use LGA 1954 Socket, 24 x 25 mm Chipset

Based on recent shipping manifests that point to custom test hardware for its next "Nova Lake‑S" processors, Intel seems to be gearing up for a big desktop platform update. According to documents obtained by NBD.ltd, Intel isn't moving full motherboards yet. Instead, it's sending out mechanical...

www.techpowerup.com

52 cores though, and on regular desktop socket. So not comparable to Genoa/Turin which are server CPUs. So the question is what AMD has planned to counter it on regular desktop socket.

I don't think AMD does need to counter it. Will be memory starved if on two channels, and if it's a more expensive platform then it moves up a price tier to threadripper.

jpiniero · Apr 22, 2025

How many Cinebench Accelerators do you need tho.

Fjodor2001 · Apr 22, 2025

inquiss said:
I don't think AMD does need to counter it. Will be memory starved if on two channels

Not according to this.

511 · Apr 22, 2025

jpiniero said:
How many Cinebench Accelerators do you need tho.

Cores are not for only Cinememe

inquiss · Apr 22, 2025

Fjodor2001 said:
Not according to this.

Interesting data but I don't agree with the conclusion. Less memory bandwidth than a low clocked milan chip. If they give up the sorts of performance figures suggested, that's a couple of generations backwards from being memory starved.

dullard · Apr 22, 2025

inquiss said:
Will be memory starved if on two channels,

Do we even know if the rumored 52-core Nova Lake will be on two channels? If DDR6 is released at the end of this year, then it is possible for Nova Lake to use it in 2026. The final DDR6 specs are to be announced this quarter. So far the DDR6 preliminary specs are for four channel memory per module, higher transfer rates (as high as DDR6-17600 in the first generation of memory chips), and lower latency.

Thibsie · Apr 22, 2025

Abwx said:
SSE was just Intel s version of 3DNow, albeit not as efficient as AMD s ISA, Atom kept some instructions from 3DNow wich had no equivalent within SSE.

Beside AMD was the first to implement FMA.

You mean proper FMA4 but Intel had to do their own stupid FMA3 ? Lol Intel

Thibsie · Apr 22, 2025

511 said:
Even Intel doesn't downclock on AVX-512 since Golden Cove that's a early implementation issues AMD had way more time than Intel to figure out and live off of Intel's efforts.

I wish AMD could do this with CUDA.

LOL who had the money and engineering ressources ? Intel. And they did crap.
This is very objective PoV.... Not !
C'mon...

inquiss · Apr 22, 2025

dullard said:
Do we even know if the rumored 52-core Nova Lake will be on two channels? If DDR6 is released at the end of this year, then it is possible for Nova Lake to use it in 2026. The final DDR6 specs are to be announced this quarter. So far the DDR6 preliminary specs are for four channel memory per module, higher transfer rates (as high as DDR6-17600 in the first generation of memory chips), and lower latency.

DDR6 is going to be server only for a while. If they do use it, which I have strong doubt over, that will prove the platform out of mainstream anyway. So it's same same vs channels.

Win2012R2 · Apr 22, 2025

511 said:
Even if you take AVX-512 for example initially when it launched it had issues and software was not ready now look at it you will find use cases for AVX-512 in almost all HPC software and few consumer software as well

Took like 10 years for AVX512 and it wasn't until Zen4 it really picked up - and AMX far far less general purpose than AVX512, plus AMD does not support it and very unlikely will, and GPUs doing better job anyway.

Abwx · Apr 22, 2025

Thibsie said:
You mean proper FMA4 but Intel had to do their own stupid FMA3 ? Lol Intel

AMD supported both FMA3 and FMA4 as a preventive move, i m aware that Intel tried to trick them by changing their own implementation at the last minute from FMA4 to FMA3 and believing that AMD was to use only FMA4 since Intel stated that they would use this implementation.

OneEng2 · Apr 22, 2025

inquiss said:
I don't think AMD does need to counter it. Will be memory starved if on two channels, and if it's a more expensive platform then it moves up a price tier to threadripper.

That was my point. It seems to get past many arguments here that there is a real world COST to high core counts and multiple memory channels (or very high bandwidth next gen memory). The user base for such a product is limited, and to attempt to put such a high cost option into the desktop/laptop would price the processor and platform clear out of the market IMO.

dullard said:
Do we even know if the rumored 52-core Nova Lake will be on two channels? If DDR6 is released at the end of this year, then it is possible for Nova Lake to use it in 2026. The final DDR6 specs are to be announced this quarter. So far the DDR6 preliminary specs are for four channel memory per module, higher transfer rates (as high as DDR6-17600 in the first generation of memory chips), and lower latency.

See my discussion above. How will Nova Lake compete in the general desktop and laptop markets with such an expensive platform?

511 · Apr 22, 2025

Thibsie said:
LOL who had the money and engineering ressources ? Intel. And they did crap.
This is very objective PoV.... Not !
C'mon...

They are in serious money situation rn and are still investing in their Fab biz and design biz with APX/AVX 10.2/AMX Extensions AMD Pulled out of the Fab biz last I checked when they were in trouble.

Win2012R2 said:
Took like 10 years for AVX512 and it wasn't until Zen4 it really picked up - and AMX far far less general purpose than AVX512, plus AMD does not support it and very unlikely will, and GPUs doing better job anyway.

Ofc this is not true lol you will see with Zen 6 if AMD introduces AMX it will be funny 🤣.

511 · Apr 22, 2025

OneEng2 said:
That was my point. It seems to get past many arguments here that there is a real world COST to high core counts and multiple memory channels (or very high bandwidth next gen memory). The user base for such a product is limited, and to attempt to put such a high cost option into the desktop/laptop would price the processor and platform clear out of the market IMO.

See my discussion above. How will Nova Lake compete in the general desktop and laptop markets with such an expensive platform?

On mobile NVL is pin compatible with PTL (4+8+4/4+0+4 SKUs) also N2 would be slightly more expensive than Intel 18AP none of these will be $30K like the rumors at best $25K N2 doesn't have the PPA benefit proportional to price increase for 50%.

For Desktop 8+16 will also exist last I checked many tiles have back in-house for NVL including 18A iGPU only the compute tile has been leaked for N2 as of now. IO and SoC can be unified share across desktop/Mobile and will be on I3.

AMD is going to use N4C for SOC/IO and N2 for Zen 6 dies
Only if someone has any estimate for 8+16 die and Zen 6 die.

Also be ready for price increase regardless of AMD/Intel N2 is not cheap.

DrMrLordX · Apr 23, 2025

OneEng2 said:
... and compete with AMD on price? I think not. Intel is already in a big financial pinch. They can't afford to throw money at the problem any longer IMO.

If they're actually releasing a 52c chip, they're not competing on price. Certainly not with a dual-channel premium desktop competitor.

Win2012R2 · Apr 23, 2025

511 said:
Ofc this is not true lol you will see with Zen 6 if AMD introduces AMX it will be funny

How about this - if Zen 6 introduces support for AMX then I'll delete my account on here, and if it does not - then you will delete yours, deal?

Thibsie · Apr 23, 2025

Of course AMD will back AMX. Zen 6 or Zen 7 who knows but they will.
It is everybody's interest, for both Intel and AMD.
Nobody wins if there are incompatibilities.

Win2012R2 · Apr 23, 2025

Thibsie said:
Nobody wins if there are incompatibilities.

Almost nobody is using AMX, it's completely irrelevant for 99.999%. Anybody who is remotely serious about AI or just wants to play with it will use Nvidia GPUs, and if AMD does not support it (which I can't see why would they with their own GPU line) then it's totally dead, it's much strategically better for AMD to have Intel suffer penalties of using them and not implementing themselves, so of course they won't say if they will or won't support it.

Simple client (where is no AMX) every day "AI" will be done on NPU which is low power, when AMX turns on it downclocks just like original AVX512 and we know how well that worked in occasional work loads.

AMX got 8 register "tiles", with total size of 8 KiB - that's like 1024 general purpose 64 bit registers, this thing is huge.

Intel is about to fire 20% of staff, that ain't going to be all "middle-managers", they will have to cut some things proper - AMX as a complete dead end is one of the prime things to cut, especially so because it's not even in client and just increases silicon size, Intel can't afford to put big chunks of useless for most silicon in to server CPUs.

NTMBK · Apr 23, 2025

Abwx said:
SSE was just Intel s version of 3DNow, albeit not as efficient as AMD s ISA, Atom kept some instructions from 3DNow wich had no equivalent within SSE.

Beside AMD was the first to implement FMA.

3DNow and SSE are totally different. 3DNow acts on the MMX registers, which are in turn aliased on the x87 registers, and only uses 64 bit vectors. It also inherited all the MMX problems of mixing with x87 code. SSE introduces completely new 128 bit vector registers separate from the x87 ones. It's a completely different (and better) instruction set.

Win2012R2 · Apr 23, 2025

NTMBK said:
3DNow and SSE are totally different. 3DNow acts on the MMX registers, which are in turn aliased on the x87 registers, and only uses 64 bit vectors. It also inherited all the MMX problems of mixing with x87 code. SSE introduces completely new 128 bit vector registers separate from the x87 ones. It's a completely different (and better) instruction set.

Typical cheap approach from AMD, very much same attitude taken with ray tracing

511 · Apr 23, 2025

Win2012R2 said:
How about this - if Zen 6 introduces support for AMX then I'll delete my account on here, and if it does not - then you will delete yours, deal?

This is a bit extreme i will stay offline for a 6 days cause it's Zen 6 🤣

511 · Apr 23, 2025

Win2012R2 said:
Almost nobody is using AMX, it's completely irrelevant for 99.999%. Anybody who is remotely serious about AI or just wants to play with it will use Nvidia GPUs, and if AMD does not support it (which I can't see why would they with their own GPU line) then it's totally dead, it's much strategically better for AMD to have Intel suffer penalties of using them and not implementing themselves, so of course they won't say if they will or won't support it.

Simple client (where is no AMX) every day "AI" will be done on NPU which is low power, when AMX turns on it downclocks just like original AVX512 and we know how well that worked in occasional work loads.

AMX got 8 register "tiles", with total size of 8 KiB - that's like 1024 general purpose 64 bit registers, this thing is huge.

Intel is about to fire 20% of staff, that ain't going to be all "middle-managers", they will have to cut some things proper - AMX as a complete dead end is one of the prime things to cut, especially so because it's not even in client and just increases silicon size, Intel can't afford to put big chunks of useless for most silicon in to server CPUs.

If you can give me a proof of AMX Downclocking 🫠🫠

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