Discussion RDNA 5 / UDNA (CDNA Next) speculation

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Vikv1918

Junior Member
Mar 12, 2025
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AMD GPUOpen released a preview for what looks like an exciting new development - https://gpuopen.com/learn/using_neural_networks_for_geometric_representation/

The technique replaces the role of a BVH in ray-tracing with a neural network. They claim its already viable for offline and online rendering.

The recent patents by AMD revolve a lot around the BVH, but here AMD is claiming they already have a viable solution that doesn't need a BVH at all. Maybe all those patents don't necessarily mean they are technologies that will be implemented? Maybe RDNA5/PS6/Nextbox can avoid having lots of fixed function RT core crap? And maybe this tech is what AMD was talking about when they said RDNA4 was "future-ready', because this tech runs on Matrix cores or WMMA rather than needing new fixed function hardware.
 

Win2012R2

Senior member
Dec 5, 2024
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AMD is claiming they already have a viable solution that doesn't need a BVH at all
"viewpoint-dependent models to per-object models that can be trained offline and reused across different scenes."

Offline training was a big downside in DLSS1, not apples to oranges, all depends how slow this training is for "per-object models", great research stuff anyway
 

soresu

Diamond Member
Dec 19, 2014
3,734
3,053
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AMD GPUOpen released a preview for what looks like an exciting new development - https://gpuopen.com/learn/using_neural_networks_for_geometric_representation/

The technique replaces the role of a BVH in ray-tracing with a neural network. They claim its already viable for offline and online rendering.

The recent patents by AMD revolve a lot around the BVH, but here AMD is claiming they already have a viable solution that doesn't need a BVH at all. Maybe all those patents don't necessarily mean they are technologies that will be implemented? Maybe RDNA5/PS6/Nextbox can avoid having lots of fixed function RT core crap? And maybe this tech is what AMD was talking about when they said RDNA4 was "future-ready', because this tech runs on Matrix cores or WMMA rather than needing new fixed function hardware.
This is the implementation and enhancement of research that they already released a paper for in 2023.

 

soresu

Diamond Member
Dec 19, 2014
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And maybe this tech is what AMD was talking about when they said RDNA4 was "future-ready', because this tech runs on Matrix cores or WMMA rather than needing new fixed function hardware
Given nVidia's push to use tensor cores for gfx outside of supersampling/upscaling this is just AMD telegraphing that they are not sitting waiting for nVidia (and MS) to pull the rug out from under them again like they did in 2018.

They know that one way or another AI/ML compute is going to play a role in graphics going forward, and that waiting on nVidia to define it for them is pure folly.
 

SolidQ

Golden Member
Jul 13, 2023
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r AI/ML compute is going to play a role in graphics going forward
Yeah, would be interesting to see what is RDNA5 bring. PS6 should be in 2+ years, so it should set new standard graphic until PS7.
Wonder how much changes in RDNA5 compared to RDNA4
 

soresu

Diamond Member
Dec 19, 2014
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Wonder how much changes in RDNA5 compared to RDNA4


A helluva lot I would wager if it is going to be the basis for both graphics and headless datacenter/AI compute accelerators going forward with this UDNA platform strategy.

Incidentally, I think that UDNA may be about more than just hardware.

I think that they may rebrand their HIP/ROCm development platform as UDNA to represent a more unified software strategy across their whole IP, including the younger XDNA derived from Xilinx.
 

soresu

Diamond Member
Dec 19, 2014
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I think Matrix Cores, which start with RDNA5 should be more and more shine for Radeon with software like Blender and other
I wouldn't bet on that.

Blender has a lot of money going into it for free software no doubt, but it's still just dribbles compared to funding funneled into its commercial competitors.

The only reason Cycles has path guiding (sorta ML for sampling light paths with least variance/noise in the scene) at all is through Intel's PGL code, which doesn't even support GPU compute at all yet, let alone HW RT.

They only just added blue noise dithering to Cycles, which Solid Angle (now Autodesk) added to the Arnold renderer something like 8-9 years ago.

Unless some friendly billionaire starts pumping 10s/100s of $millions into Blender's development fund annually I wouldn't expect to find anything state of the art and open in there that isn't integrated from 3rd party code bases.

Of course if you have an nVidia card it likely won't be a problem as the Blender devs are well known nVidia bros who will happily shill for proprietary code for them at the drop of a hat while massively bloating the download size for everyone else due to nVidia code in there that doesn't actually help anyone with AMD or Intel hw ☹️

(I'm more than a little bitter about this, do forgive my rant 😅)
 

Win2012R2

Senior member
Dec 5, 2024
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This has nothing to do with upscaling, though. This is about RT.
Naturally, so the part I highlighted is "offline processing" which was a handicap for DLSS1, same thing might happen here too - and it was Nvidia that was giving expensive machine time to train DLSS1, this sort of requirement fixes things in a way that future drivers can't really fix, having said that IF this is the practical way to solve slow RT then great
 
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Bigos

Member
Jun 2, 2019
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We are talking about AS (acceleration structure) creation. This is probably per model, so BLAS (bottom-level AS). This can be done during asset compilation. These are currently compiled to BVH at game load time, which provides flexibility (each vendor has its own BVH flavor).

If it turns out to be very expensive then indeed this would be a handicap. Requiring separate model per vendor to be pre-built is also not gonna fly on PC, but is doable on consoles.
 

Gideon

Platinum Member
Nov 27, 2007
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A very interesting approach by AMD to speed up raytracing by using neural networks (easy matrix multiplications) instead of divergent ray travertial (this time not viewport dependent!). Really hope this is adopted at some point:


Do i understan correctly that this needs per-object (offline) training and is therefore limited to non-deforming objects? (the lights and objects can move but AFAIK not deform)?

By pretraining per-object networks and removing costly bottom-level BVH traversal, LSNIF provides a scalable, efficient, and high-quality alternative for ray-geometry intersection. Its ability to generalize across ray types and operate without scene-specific retraining positions it as a promising direction for the future of neural rendering.

Anyway, very impressive visually:







In our implementation, LSNIF is realized as a custom intersection shader. During ray traversal, instead of intersecting against traditional geometric primitives like triangles, the shader executes a neural inference step to determine if and where a ray intersects the implicit surface defined by LSNIF. This approach enables the use of LSNIF not just for primary visibility, but also for secondary rays—reflections, shadows, and global illumination.

Figure 3 showcases images rendered entirely with this DXR-based renderer. The scene contains instanced LSNIF-represented Stanford Bunny models, with no traditional geometry buffers — no BVH structures, no vertex or index buffers. All spatial queries are handled by the LSNIF through inference.



Now i only wish to see the theoretical performance uplift this can give. For the original viewport specific NIF it was 35%. Should theoretically be better for this one, right?
 

branch_suggestion

Senior member
Aug 4, 2023
652
1,373
96
AMD GPUOpen released a preview for what looks like an exciting new development - https://gpuopen.com/learn/using_neural_networks_for_geometric_representation/

The technique replaces the role of a BVH in ray-tracing with a neural network. They claim its already viable for offline and online rendering.

The recent patents by AMD revolve a lot around the BVH, but here AMD is claiming they already have a viable solution that doesn't need a BVH at all. Maybe all those patents don't necessarily mean they are technologies that will be implemented? Maybe RDNA5/PS6/Nextbox can avoid having lots of fixed function RT core crap? And maybe this tech is what AMD was talking about when they said RDNA4 was "future-ready', because this tech runs on Matrix cores or WMMA rather than needing new fixed function hardware.
Who knew that decades of branch prediction research would have other applications?
 

511

Golden Member
Jul 12, 2024
1,988
1,751
106
Not sure if CDNA 5 / UDNA is on N2

Zen 6c 32 core CCD for sure is on N2. Not sure if there is a economic case for other chips to be on N2
It leaked a while back and from what is know MI350X is supposed to be N3E and MI400 N2.
 
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