7. Zen 7 no more - Prometheus is AMD's first custom ARM core after Soundwave.
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Lisa Su says AMD is on track to a 100x power efficiency improvement by 2027.
Tell me you haven't heard of AMD K12 without telling me you haven't heard of AMD K12...7. Zen 7 no more - Prometheus is AMD's first custom ARM core, period.
They don't have to abandon them outright. In 10 years a Legacy business software can easily be catered to with incremental updates to legacy cores. They migh t sill focus to other ISAs.And no, AMD won't abandon x86... that is a silly train of thought... there is far too much money in the x86 market that will never go away...
First, M. Clark spoke about AMD-x86 vs. AMD-ARM when he mentioned "same performance per Watt".Mike Clark mentioned above statement regarding performance per watt. For comparison, I have created a table comparing x86 and ARM with GeekBench 6 ST performance, and I hope nobody believe what Mike claimed about PPW.
Fanless designs are not very common in the datacenter; they are common in handsets.Qualcomm, Mediatek not to mention Apple's M4 are all surpassing AMD's KRK/STX in single thread performance with fanless design.
Firmware standards and device drivers are much more relevant in the question of porting an operating system to a platform; CPU ISA version not so much.Have you wonder how Microsoft going to support upcoming ARM vendors like NV, AMD, Mediatek and Samsung? Microsoft could hard patch the OS to allow all upcoming CPU vendors to access low level kernel; Or Microsoft could launch brand new OS like Windows 12 ARM supporting all CPU vendors ?
According to Wiki, MacOS 15 has been updated to support ARMv9 in the operating system level. Microsoft could follow steps to modermize OS by supporting ARMv9 as well.
The baseline is clearly defined by a named open source RISC-V out or order CPU core design to compare against, so it's not like they are just pulling numbers out of thin air even if they are simulated or FPGA.Claims in scientific papers have to be impressive
3. The Arrival of LPDDR6
LPDDR6 will bring huge bump in memory bandwidth, that's mean all vendors will bump the core counts of CPU, GPU and NPU. With more cores, so does the power consumption. x86 with high clock speed won't be able to scale without big bump in power usage. There was rumor about Qualcomm's next gen X-Elite with 192-bit memory bus comes with 18 cores. And if my speculation is correct, upcoming Apple M5 Pro with 192-bit LPDDR6 should get bump of 14-core to 18-core as well ? We are talking about monolithics SoC, not chiplet design which is more expensive and power hungry..
It's the local schizo just press the ignore button and move on.Is AMD really that hard to understand?
Creating a biased argument by omission and outright misinterpretation to this degree is actually making my blood boil.
That is all, too much is wrong to bother correcting.
Still better than B3D I suppose.It's the local schizo just press the ignore button and move on.
9. Venice 192-core (600W) -> Vera Superchip 176-core (100W) -> Prometheus
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While I am trying to create a table listing potential Vera specs, Bionics and HXL has pretty much confirmed about Venice SP7/SP8 specs and TDP. Thanks to the leaks, I have pretty good idea about Venice platform which seems confusing at first. Let's go point to point:
- First of all, there are 2 Zen6 dies: Zen6 with 12-core and 48MB L3 cache will be fabbed by N3P process, not N2 as last rumor leaked. Zen6c with 32-core and 128MB die will be fabbed by N2 process. Two Zen6 will be used for next gen client CPU; that make total 24 max core counts.
- By doubling the L3 cache, Zen6c and Zen6 should share most of the features.....except clock speed due to extra 20 cores in Zen6c. More on that later.
- SP7 platform will support 16-channel DDR5. So far there is one model leaked with 8 Zen6c die and 2 IOD. Each IOD should support 8-channel DDR thus SP7 requires 2 IODs.
- SP8 platform will support 8-channel DDR5. By cutting half of memory bandwidth, SP7 could only support up to 128 Zen6c / 96 Zen6. Yep, it is lower than Turn Dense with 12-channel memory bus.
- Here comes my understanding of TDP numbers. According to leaks, 256-core should come with 600W, each Zen6c should consume 50W and each IOD should consume 100W. That sum up total 600W.
- 96-core Zen6 with 400W: Each Zen6 should consume 40W and each IOD should consume 80W (without linking to other IOD). Total 400W.
- 128-core Zen6c with 350W: After deducting 80W IOD power, each Zen6 die should consume 67.5W which is higher than Zen6c in SP7. My thinking is AMD might try to clock Zen6c higher so that the difference between 96-core Zen6 and 128-Zen6c will be as small as possible. Thus, AMD could command higher price tag for 128-core.
- 192-core Zen6c with 600W: Bionic believe Zen6 die will be used in SP7 platform. I don't think so, there is no point putting more than 8 dies in SP7 when Zen6c is able to fit in the core counts. What we are lacking is HP Zen6c: And if we apply 67.5 with 6 dies, we get total sum of 605W. Thus, I believe AMD will use 6 Zen6c die to create high performance 192-core...
Yep, 50W is the TDP numbers given by Jensen. I suspect it means CPU cores only excluding memory controllers. I will put question marks for Vera SoC. As for memory controllers, LPDDR6 is coming real soon. Vera which is coming by end of 2026 should utilize LPDDR6, we shall see..Your Vera specs massively underestimate TDP. (Also, Vera doesn't have LPDDR6, AFAIK. It has LPDDR5X and, bizarrely, DDR5, though I have no idea if the latter will be enabled in released silicon.)
Yep, 50W is the TDP numbers given by Jensen. I suspect it means CPU cores only excluding memory controllers. I will put question marks for Vera SoC. As for memory controllers, LPDDR6 is coming real soon. Vera which is coming by end of 2026 should utilize LPDDR6, we shall see..
1) I highly doubt it's 50W for just the CPU cores unless they were not very performant cores (And as we all know, Jensen would never lie... Right guys... Right?!?!)Yep, 50W is the TDP numbers given by Jensen. I suspect it means CPU cores only excluding memory controllers. I will put question marks for Vera SoC. As for memory controllers, LPDDR6 is coming real soon. Vera which is coming by end of 2026 should utilize LPDDR6, we shall see..
I think what is going on is that Vera will support CXL on its PCIe lanes and you will be able to attach DDR5 modules to Vera via CXL.mem.Your Vera specs massively underestimate TDP. (Also, Vera doesn't have LPDDR6, AFAIK. It has LPDDR5X and, bizarrely, DDR5, though I have no idea if the latter will be enabled in released silicon.)
5. WoA 12 / Windows Server for ARM
Have you wonder how Microsoft going to support upcoming ARM vendors like NV, AMD, Mediatek and Samsung? Microsoft could hard patch the OS to allow all upcoming CPU vendors to access low level kernel; Or Microsoft could launch brand new OS like Windows 12 ARM supporting all CPU vendors ?
According to Wiki, MacOS 15 has been updated to support ARMv9 in the operating system level. Microsoft could follow steps to modermize OS by supporting ARMv9 as well. That's mean Microsoft could launch Windows 12 by the end of this year with NV/AMD's Soundwave/Mediatek.
As for Windows Server ARM, it should be based on WoA12. The only issue is we don't have CPU vendors with flagship performance: if Microsoft is waiting for NV's Vera / AMD's Prometheus, then Microsoft could launch Windows Server on ARM by end of 2026...we shall see...
Not too sure about WindowsLatest's interpretation of that string.Leak shows Windows 11 25H2 with Build 26200, not a big release like Windows 11 24H2?
Windows 11 25H2 is indeed coming, and the odds of it being a minor release compared to Windows 11's 2024 Update are much higher.www.windowslatest.com
Yep, here is the latest leaks about so-called 25H2 updates for Windows 11 even though Microsoft has not officially confirmed the update which seems weird.
The new entry labeled GE25H2, which stands for “Greater than or equal to Windows 11 25H2.” WTH, >= ??? This could indicate Windows 12 is indeed coming by the end of 2025. Also, Microsoft has started testing “behind-the-scenes platform changes,” it could mean Microsoft could upgrade the kernel to support ARMv9 as speculated by me. As I said, things will get interesting by the end of the year, stay tuned.
More likely win x86-64 comes with lots of baggage that eats up powerif x86 don't live well in low consumption, will go ARM for that
Upcoming Q1? X Elite 2 should honestly embarrass Panther Lake CPU wise.More likely win x86-64 comes with lots of baggage that eats up power
WoA can provide a clean break from the past
Apples not a chip maker, makes sense why they leave it out as the chips only come with their devices.Apple M continues it (and it pays of, if I got money for each time somebody posts that the chips are "5W"...).
Remains to be seen if they can emulate x86 power efficiently because it's going to be several years before an ARM alternative is available for every popular application.WoA can provide a clean break from the past
Any particular baggage you have in mind?win x86-64 comes with lots of baggage that eats up power