Windows and scheduling correctly 🤣 they need modification or tuning to the scheduler to make this work.
Windows and scheduling correctly 🤣 they need modification or tuning to the scheduler to make this work.Why reinvent the wheel when Windows does it already.
Strix halo is good enough (power-wise) to be used as a handheldNo more offerings for a rising market of windows handhelds?
Yeah works well for Qualcomm.Windows and scheduling correctly 🤣
It's not.Strix halo is good enough (power-wise) to be used as a handheld
So that swimlane is completely dead? Not generating enough revenue?Yeah works well for Qualcomm.
It's not.
Handheld is a 10W SDP target (generously, more like 7W ideally).
Premium FF stuff? yea.So that swimlane is completely dead? Not generating enough revenue?
As I see it there are 2 different marketsSo that swimlane is completely dead? Not generating enough revenue?
Seems like AMD has that market sewn up, don't understand why they'd retreat from there
Qualcomm Snapdragon On windows has 12 Same cores Strix point ran into issues initially as wellYeah works well for Qualcomm.
Can be 15W as well but 7-15W is the ideal range imoIt's not.
Handheld is a 10W SDP target (generously, more like 7W ideally).
You do understand that there's been WoA devices before 8cx g4?Qualcomm Snapdragon On windows has 12 Same cores Strix point ran into issues initially as well
Yes but there were very few of those and we didn't have this much detailed benchmark like Qualcomm Elite X.You do understand that there's been WoA devices before 8cx g4?
there were very much detailed benchmarks of 8cx g3 in particular.Yes but there were very few of those and we didn't have this much detailed benchmark like Qualcomm Elite X.
Quite possible that Microsoft would announce a zen6 & RDNA 5 based handheld next year (probably same performance as current series S)Medusa still strikes me as needing a bit too much juice to be IDEAL for the handheld market. Even with a new process, it's going to suffer in a sub 10w environment with the rumored core count. 3 watts for the iGPU and 3 watts for the CPU cores with 1W for extra system power doesn't give you a whole lot of performance to play with, even if you can dynamically rebalance power effectively and boost to 10. Above that, it should do well in the current generation of large, hefty handhelds. Granted, it should still be notably better than what's out there though.
To offer moar coars than are sensible in client, which is 8, not counting dedicated LP cores.It is i wonder what's the purpose for it
completely goofy
I'd say it is¹ only as goofy as it needs to be for the purpose, and not complicated at all compared with some already existing client CPUs.complicated
If you are referring to the HXL tweet — this was only about a "Medusa Point 1". Also only about Medusa incarnations in the R5/R7/R9 tiers (that is, not in an R3 tier).Medusa still strikes me as needing a bit too much juice to be IDEAL for the handheld market.
AMD hasn't had an R3 product that wasn't a DEEP die recovery product for OEMs since Mendocino. Wouldn't be totally shocked by a 2+2 or 2+2+2 part.If you are referring to the HXL tweet — this was only about a "Medusa Point 1". Also only about Medusa incarnations in the R5/R7/R9 tiers (that is, not in an R3 tier).
FWIW.
I think that once the total cost of ownership is included in 18A (it did cost more than a Ford class aircraft carrier to develop), that it is likely the most expensive process that has ever been developed. Additionally, the number of passes needed to achieve 18A makes every wafer more expensive (this goes for N2 as well to a lesser extent I believe).Why do you think that PTL is very expensive if anything it is going to be equal or cheaper than Arrow Lake H.
114mm2 is on 18A while it is expensive it is not that expensive as buying N4 Wafers not to mention TSMC has already hiked the price couple of times this year are you guys ignoring that?
54mm2 N3E silicon it is going to be slightly expensive and 49mm2 N6 Silicon this is dirt cheap and the rest two are passive that is just raw material. Include Advanced Packing as well which is not cheap though.
Arrow Lake H for Reference has every silicon made on TSMC so there goes Intel's foundry margin there is not a single Intel silicon except for the base die.
Does AMD has something like thread director to schedule properly with P/C/LP-C?
I think it likely that the built in OS director will work quite well on Zen 6 for a couple of reasons:Windows and scheduling correctly 🤣 they need modification or tuning to the scheduler to make this work.
Neither actually do scheduling on Intel.2) MS and Linux have experience now with Arrow Lake and are better equipped to handle the LP cores of any architecture now.
If you include cost of ar&D and all the stuff than yes it isI think that once the total cost of ownership is included in 18A (it did cost more than a Ford class aircraft carrier to develop), that it is likely the most expensive process that has ever been developed. Additionally, the number of passes needed to achieve 18A makes every wafer more expensive (this goes for N2 as well to a lesser extent I believe).
You are forgetting strix point is 232.5+ mm2 of N4P monolithic Panther Lakes True competition not the single CCD.Considering that a Zen 5 CCD on N4P is 71mm2, 114mm2 on 18A is a monster sized die.
You need to compare it to Intel 6+8 die also Z5 CCD is 69mm2 iirc.Currently AMD's 71mm2 N4P part is more than a match for Intel's N3B part. It is no wonder that Intel is bleeding cash. What really surprises me is how some in this forum think it would be a good strategy for AMD to fall into as well. Just pay for the most expensive process money can buy and create a big die and sell it in volume?
Even the base architecture is same the PnP characteristics are not.I think it likely that the built in OS director will work quite well on Zen 6 for a couple of reasons:
1) AMD's cores are all universal in their base architecture
I think that once the total cost of ownership is included in 18A (it did cost more than a Ford class aircraft carrier to develop), that it is likely the most expensive process that has ever been developed. Additionally, the number of passes needed to achieve 18A makes every wafer more expensive (this goes for N2 as well to a lesser extent I believe).
I think that once the total cost of ownership is included in 18A (it did cost more than a Ford class aircraft carrier to develop), that it is likely the most expensive process that has ever been developed. Additionally, the number of passes needed to achieve 18A makes every wafer more expensive (this goes for N2 as well to a lesser extent I believe).
Considering that a Zen 5 CCD on N4P is 71mm2, 114mm2 on 18A is a monster sized die.
Currently AMD's 71mm2 N4P part is more than a match for Intel's N3B part. It is no wonder that Intel is bleeding cash. What really surprises me is how some in this forum think it would be a good strategy for AMD to fall into as well. Just pay for the most expensive process money can buy and create a big die and sell it in volume?
That R&D is a sunk cost at this point. Will 18A be profitable when you include the fixed cost component of that R&D (plus fab buildout etc.) in the per wafer costing? Probably not - even with great yields - because they don't have much in the way of customers. Since it is sunk cost what matters more immediately is whether it is profitable when you just consider the variable costs like the per wafer materials, chemicals, power, wages, equipment maintenance etc. On that basis they're easily profitable, even if their yields were the worst case rumors of being 50% or whatever it was earlier this year and never improved.
Now obviously you can't run your business on making huge investments, considering that a sunk cost, then disregarding that sunk cost when determining profitability. They've no doubt already sunk most of the fixed cost for 14A at this point, where the decisions come in are whether they go forward with 10A which likely has a lot of investment still required, or pull the plug. For the board not to pull the plug on 10A I think they need to show they can reach competitive yields with 18A, and/or better progress with 14A than 18A had at the same stage in its development. If there's a hard decision it would come next summer.
25w windows/xbox handhelds with 80w batteries — kraken's successor can perfectly fill this
They already changed the depreciation to 8 years and tbhand the R&D and sunken cost can only be taken back by filling the fabs.The R+D are sunk cost, as you say, and already expensed. But one thing you did not mention is equipment depreciation. That is part of the expense. Cost of the equipment gets expensed through their depreciation, and this goes into the earnings statements. It is a big component for foundries.