Question Zen 6 Speculation Thread

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reaperrr3

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May 31, 2024
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High-end laptop owners are probably going to use dGPUs anyway.
Sure, but 8 CUs @ N3P are going to be tiny anyway and don't increase the APUIOD's cost all that much.
This is likely mostly a matter of this construct having better PPW and smaller package than using 2x CCD + 4nm IOD, plus probably the main reason for this anyway:

NPUs with 80 TOPs will probably be required for Copilot++ certification, and neither the 12C-CCD nor the desktop IOD will have that.
 
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StefanR5R

Elite Member
Dec 10, 2016
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My issue with that CCD+APU R9 is I don't know who wants that exactly.
Of course I don't know whether there is any merit to that rumor, but here is a proposal nevertheless: All (OEMs and end customers) who look for "R9" tier core count combined with near the maximum GPU performance which can be implemented on top of dualchannel {LP,}DDR5, plus maybe eligibility for whatever sticker programs Microsoft is running when these go on sale.

People looking toward high parallel CPU performance can get a (much) lower-cost IOD and 2x 12c CCDs.
NPUs with 80 TOPs will probably be required for Copilot++ certification, and neither the 12C-CCD nor the desktop IOD will have that.
I caution that it is actually uncertain for now whether there will be a direct successor of Granite Ridge's/ Fire Range's IOD, i.e. one without any changes apart from improved memory datarate and IFoP replaced by fanout.
 

Kepler_L2

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Sep 6, 2020
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Of course I don't know whether there is any merit to that rumor, but here is a proposal nevertheless: All (OEMs and end customers) who look for "R9" tier core count combined with near the maximum GPU performance which can be implemented on top of dualchannel {LP,}DDR5, plus maybe eligibility for whatever sticker programs Microsoft is running when these go on sale.



I caution that it is actually uncertain for now whether there will be a direct successor of Granite Ridge's/ Fire Range's IOD, i.e. one without any changes apart from improved memory datarate and IFoP replaced by fanout.
Medusa and Olympic Ridge/Gator Range have different IODs
 

reaperrr3

Member
May 31, 2024
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Copilot++ is 70 TOPs minimum imo
Maybe, but cp+ was 40 TOPs and both Intel and AMD went beyond that right off the bat, so I assume AMD themselves will aim for at least 80 TOPs anyway.

I caution that it is actually uncertain for now whether there will be a direct successor of Granite Ridge's/ Fire Range's IOD, i.e. one without any changes apart from improved memory datarate and IFoP replaced by fanout.
In addition to what kepler_l2 said, there have been concrete, realistic rumors about a new desktop IOD floating around before.
Which is usually a sign the info is legit, because when people just make stuff up, they usually either exaggerate or mess up by adding info that makes no sense, which hasn't been the case here.

Plus, using that N3P APU as IOD on desktop would be way too expensive, while the Zen4/5 IOD is getting way too outdated.

Rumors are clearly indicating an increase in CUs, addition of 2 LP cores and a cheaper process, likely something like N4C.
Which all makes sense, as a newer process is only needed when you have lots of perf/efficiency-sensitive logic transistors on-die, which this IOD probably won't have.
 

511

Platinum Member
Jul 12, 2024
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Maybe, but cp+ was 40 TOPs and both Intel and AMD went beyond that right off the bat, so I assume AMD themselves will aim for at least 80 TOPs anyway.
NVL TOPS has been leaked and it was 75 TOPS
In addition to what kepler_l2 said, there have been concrete, realistic rumors about a new desktop IOD floating around before.
Which is usually a sign the info is legit, because when people just make stuff up, they usually either exaggerate or mess up by adding info that makes no sense, which hasn't been the case here.

Plus, using that N3P APU as IOD on desktop would be way too expensive, while the Zen4/5 IOD is getting way too outdated.

Rumors are clearly indicating an increase in CUs, addition of 2 LP cores and a cheaper process, likely something like N4C.
Which all makes sense, as a newer process is only needed when you have lots of perf/efficiency-sensitive logic transistors on-die, which this IOD probably won't have.
Yeah I agree N4C for desktop and N3P for mobile server would likely be N4C as well.
 

Win2012R2

Senior member
Dec 5, 2024
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You can't sell it in volumes cause OEM's want cheap stuff not expensive stuff
Very cheap volume product could be previous gen on N4C - just like Zen 3 was still selling.

Real money come from selling premium stuff.
 

511

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Jul 12, 2024
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Very cheap volume product could be previous gen on N4C - just like Zen 3 was still selling.
I wonder how cheap N4C would be after price hike and if any company wants Made in USA they will get more increase in price 🤣.
Real money come from selling premium stuff.
Agreed but the premium product should be good from buyers Point of View
 
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inquiss

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Oct 13, 2010
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You can't sell it in volumes cause OEM's want cheap stuff not expensive stuff
The premium stuff is going to enterprise and retail. Won't get many OEM PCs with the premium stuff. The plan is to sell high cost products where you get high margin and use n-1 for volume parts. It's why all the monolithic stuff is on n3 class nodes.
 

511

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Jul 12, 2024
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The premium stuff is going to enterprise and retail. Won't get many OEM PCs with the premium stuff. The plan is to sell high cost products where you get high margin and use n-1 for volume parts. It's why all the monolithic stuff is on n3 class nodes.
that makes sense but do you think OEMs won't cheap out on Enterprise stuff as well. They take every cost cutting measure.
 

inquiss

Senior member
Oct 13, 2010
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that makes sense but do you think OEMs won't cheap out on Enterprise stuff as well. They take every cost cutting measure.
I mean, yes and no. If by enterprise of you mean on site servers and laptops then the latter has monolithic dies on n-1 nodes and for cheaper stuff you have the smaller, lower cost stuff platform or Genoa. AMD has a cost structure advantage vs Intel across server so same argument applies there but AMD could be cheaper if they wanted to be.
 

Doug S

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Feb 8, 2020
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The R+D are sunk cost, as you say, and already expensed. But one thing you did not mention is equipment depreciation. That is part of the expense. Cost of the equipment gets expensed through their depreciation, and this goes into the earnings statements. It is a big component for foundries.

That is still a sunk cost in cash terms. They may depreciate equipment across multiple years accounting/tax wise but cash wise they've already paid for it. So it is a sunk cost regardless of the fact they haven't even begun to depreciate their 18A investments yet.

I'm not trying to represent this "sunk cost" decision as something that is reflected in their books governed by GAAP/FASB and for tax purposes the IRS. I'm just talking about how the C suite and board will evaluate the decision. They are looking at these more immediate decisions from the viewpoint of cash flow, because they need within the next couple years to become cash flow positive or they won't be able to continue to invest in R&D or build the fabs for 10A.
 

OneEng2

Senior member
Sep 19, 2022
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That R&D is a sunk cost at this point. Will 18A be profitable when you include the fixed cost component of that R&D (plus fab buildout etc.) in the per wafer costing? Probably not - even with great yields - because they don't have much in the way of customers. Since it is sunk cost what matters more immediately is whether it is profitable when you just consider the variable costs like the per wafer materials, chemicals, power, wages, equipment maintenance etc. On that basis they're easily profitable, even if their yields were the worst case rumors of being 50% or whatever it was earlier this year and never improved.
As you mentioned, the game Intel is playing results in bankruptcy. If their intent is to match or exceed TSMC's capabilities while servicing a small fraction of the wafers to distribute the astronomical costs over, there is no hope financially for Intel.

This game just goes on with the next generation process, and the next generation equipment (High NA). It isn't sustainable.

Therefore, you can't just say that the >20bn is a sunk cost. It must be paid for through the use of that equipment. Any business that writes off its "sunk cost" in order to make a particular product "look" profitable is doomed.
Maybe a better identification would be "volume segment", and the N2 Zen 6 is not intended for that segment. It is intended for premium segments.
- Medusa 1 (which looks higher end than Strix Point)
- Medusa Halo
- Desktop Zan 6.
- EPYC

When Zen 6 and Zen 6x3d desktop go on sale, there will still be Zen 5 desktop and Zen 5x3d on sale. 9800x3d may by then be entering lower tier - "volume segment" while Zen 6 + x3d will be premium

In notebooks, the "volume segment" will have Medusa 2, which will be monolithic Kracken successor, most likely on N3P.

And before Zen 6, there will be another set of notebook CPUs, derivatives of Strix Point and Kracken. Olrak posted some 400 series SKUs on Twitter that might be Gorgon Point refresh. In other words, more volume parts that are on N4P.

So, there will be plenty of volume parts on sale that are not N2.
I like that analysis. Are you also saying that not all Zen 6 will be N2?
 
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511

Platinum Member
Jul 12, 2024
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As you mentioned, the game Intel is playing results in bankruptcy. If their intent is to match or exceed TSMC's capabilities while servicing a small fraction of the wafers to distribute the astronomical costs over, there is no hope financially for Intel.

This game just goes on with the next generation process, and the next generation equipment (High NA). It isn't sustainable.

Therefore, you can't just say that the >20bn is a sunk cost. It must be paid for through the use of that equipment. Any business that writes off its "sunk cost" in order to make a particular product "look" profitable is doomed.
they just need customer or they should feed the market with good cheap stuff and forget about high margin including CCG.
I like that analysis. Are you also saying that not all Zen 6 will be N2?
Is there anything to doubt only the server desktop would be N2 rest would be on N3P.
 
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Doug S

Diamond Member
Feb 8, 2020
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As you mentioned, the game Intel is playing results in bankruptcy. If their intent is to match or exceed TSMC's capabilities while servicing a small fraction of the wafers to distribute the astronomical costs over, there is no hope financially for Intel.

This game just goes on with the next generation process, and the next generation equipment (High NA). It isn't sustainable.

Therefore, you can't just say that the >20bn is a sunk cost. It must be paid for through the use of that equipment. Any business that writes off its "sunk cost" in order to make a particular product "look" profitable is doomed.

You are just not understanding what I'm saying. I clearly said this isn't something you can do long term but doing the analysis TODAY the analysis must take sunk cost into consideration. I also clearly said that Intel needs a lot more capacity to have a chance of reaching profitability. Nothing you are saying here is anything I've disagreed with.

I don't know what your issue is other than inability to understand my point or that you just want to argue.
 

OneEng2

Senior member
Sep 19, 2022
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they just need customer or they should feed the market with good cheap stuff and forget about high margin including CCG.

Is there anything to doubt only the server desktop would be N2 rest would be on N3P.
Well, I am in the camp that only server would be N2 for Zen 6 just as today N3E is Server only while all other is N4P for Zen 5.
It looks like all chiplet based Zen 6 (= premium) will be N2 based and monolithic chips (= volume) will likely use N3
That is one possible situation. It isn't how AMD has played Zen 5 though. The most expensive process is limited to DC while higher volume markets (monolithic and chiplet based) are N4P.
You are just not understanding what I'm saying. I clearly said this isn't something you can do long term but doing the analysis TODAY the analysis must take sunk cost into consideration. I also clearly said that Intel needs a lot more capacity to have a chance of reaching profitability. Nothing you are saying here is anything I've disagreed with.

I don't know what your issue is other than inability to understand my point or that you just want to argue.
Cool your jets. I am agreeing with you and elaborating on your points. No need to get your panties all in a bunch!
 
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