Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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511

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Linux changes for many of the lunar lake were not merged in the kernel version he tested so it was kind of a beta test initially.
 
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dullard

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Nice find Igor.
I wonder how much of this is just due to bumping up power/heat though?
Linux just fixed an Intel power issue (the NPU was never put to sleep and kept using power even when idle): https://www.phoronix.com/news/Linux-6.15-Fix-ARL-U-H-s2idle

As for the desktop Arrow Lake, Phoronix found a 6% speed improvement with a 3% average power reduction. This came from Linux changes putting the software on the proper cores (see the first two graphs here):

Just saying that performance changes and power changes can very well be independent from each other. This is especially true when drivers or the OS are operating a CPU out of the optimum conditions.
 
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Tigerick

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Intel is claiming 20% performance uplift. 4+8+4 we have 16 cores on the same die (18A) compared to 14 main CPU cores
Last year, my source told me Intel was claiming 20% performance uplift compared to ArrowLake H with 6+8+2 cores. Now Intel is claiming similar performance with ARL-H. Well, depending on the final clock speed, I am actually expecting worse performance than ARL-H @ 5.4GHz max. Sure, iGPU will perform faster thanks to TSMC's N3E process with 12 Xe cores but not CPU fabbed by IFS's 18A...

Come on, how hard could 4+8+4 compute die be made? Turn out very hard for IFS, that's why IFS cancelled 20A process and completely forgotten about 6+8 exists in the roadmap...
 

511

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Last year, my source told me Intel was claiming 20% performance uplift compared to ArrowLake H with 6+8+2 cores. Now Intel is claiming similar performance with ARL-H. Well, depending on the final clock speed, I am actually expecting worse performance than ARL-H @ 5.4GHz max. Sure, iGPU will perform faster thanks to TSMC's N3E process with 12 Xe cores but not CPU fabbed by IFS's 18A...
20% MT? Intel claimed LNL efficiency with ARLH MT IDK what that means.
Come on, how hard could 4+8+4 compute die be made? Turn out very hard for IFS, that's why IFS cancelled 20A process and completely forgotten about 6+8 exists in the roadmap...
It's just all rumors coming from Taiwan. Also they have a money problem now a very big one when 20A was supposed to ramp. They didn't have money to ramp 🤣.
 
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Tigerick

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20% MT? Intel claimed LNL efficiency with ARLH MT IDK what that means.
Oh, about that slide actually compared to PTL-H and PTL-U series seperately. Thanks to your X links about PTL-H SKUs; what is missing is PTL-U SKUs which are supposed to be released around the same timeframe.

Basically, PTL-U is a ultra-portable SoC with 4P + 4LPe (8 e cores are disabled) and 4XE cores (Intel 3-E). PTL-U are most likely replacing ARL-U but not LNL-MX. LNL-MX is more power efficiency and comes with 8 XE cores.
It's just all rumors coming from Taiwan. Also they have a money problem now a very big one when 20A was supposed to ramp.
 

511

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Oh, about that slide actually compared to PTL-H and PTL-U series seperately. Thanks to your X links about PTL-H SKUs; what is missing is PTL-U SKUs which are supposed to be released around the same timeframe.
I think the marketing is a mess after the 35% cut.
Basically, PTL-U is a ultra-portable SoC with 4P + 4LPe (8 e cores are disabled) and 4XE cores (Intel 3-E). PTL-U are most likely replacing ARL-U but not LNL-MX. LNL-MX is more power efficiency and comes with 8 XE cores.
I am not really sure about the CPU part being more efficient than LNL vs 4+0+4 PTL-U the GPU can be but not other parts cause everything is brand new and upgraded in PTL.
 

511

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AcrosTinus

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Well I read a serve the home article that says there are 16 DIMM Slots on each side that would mean this is a freaking 16 Channel platform

Wouldn't that throughput be needed for a single socket scale up, like more cores, lanes and even higher PCIe generation ?
 

511

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Wouldn't that throughput be needed for a single socket scale up, like more cores, lanes and even higher PCIe generation ?
Yeah it will be there Is also DDR5 12800 MT/s MRDIMMS for DMR delivering 1.63 TB/s Bandwidth!. That's more than 4090 and just less than that of 1.79 TB/s for 5090.
 

MS_AT

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Yeah it will be there Is also DDR5 12800 MT/s MRDIMMS for DMR delivering 1.63 TB/s Bandwidth!. That's more than 4090 and just less than that of 1.79 TB/s for 5090.
Hopefully most of it will be usable, compared to the Sapphire Rapid HBM fiasco where out of theoretical 1.60TB/s only 700-600GB/s is usable by the CPU. Of course with DDR5 there is also a difference between practical and theoretical BW, but usually it's 70-80%

 
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yuri69

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Well I read a serve the home article that says there are 16 DIMM Slots on each side that would mean this is a freaking 16 Channel platform
The 2026 AMD Venice is reportedly split between a highend SP7 socket with 16ch and SP8 socket with a lower channel count. So yea, it's expensive but nothing extraordinary for 2026-2027 products.
 
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511

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Hopefully most of it will be usable, compared to the Sapphire Rapid HBM fiasco where out of theoretical 1.60TB/s only 700-600GB/s is usable by the CPU. Of course with DDR5 there is also a difference between practical and theoretical BW, but usually it's 70-80%
Look what i found looks like something is bottle necking GNR in 2S config i wonder what are the values for 1S.

Zen 6 is 16 channel with DDR5 8000 IIRC so approx 1 TB/s.
 
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AcrosTinus

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Arrow Lake-S refresh coming after all:

They surprised me in a positive and negative sense with Raptor Cove, the gaming improvements from the 12900K were crazy, even a 13600K could surpass it. Can they pull that again, this time without degradation ?
 

Fjodor2001

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i was being sarcastic over the improvement to NPU as intel choose to focus on this.
Likely it’s to pass some Microsoft Copilot AI TOPS threshold requirement so they can put a necessary sticker for that on the PC box. Might affect sales if the average Joe is told to look for that when buying a new PC.
 
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AcrosTinus

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Not sure why you are expecting magic with the Refresh? It's likely just Arrowlake but 100-200MHz higher clocks.
I am still hoping for some tweaks to the cache like they did with Raptor Lake, It might be cope but 12900K -> 13900K is the gain I am hoping for not 13900K -> 14900K, they have two options to surprise me with.
 
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