Question What is Skymont IPC equivalent too

Wolverine2349

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Oct 9, 2022
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I remember Intel claimed it would be 2% better than Raptor Cove.


While Skymont impressed and was a big leap over e-cores in Raptor Lake let alone Alder Lake, it seems it was not clocked normalized Raptor Cover IPC.

So what is Skymont IPC actually like clock normalized? Is it like Zen 3, a bit better than Zen 3 but behind Zen 4 or like Zen 4. Overall of course. I know it probably depends on workload. But in your opinion what is its clock normalized Skymont IPC like?

I know overall Arrow Lake is bad for gaming because of its design though was that more to do with its L3 layout and tile based design than the Lion Cove and Skymont cores themselves??
 

DavidC1

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I remember Intel claimed it would be 2% better than Raptor Cove.


While Skymont impressed and was a big leap over e-cores in Raptor Lake let alone Alder Lake, it seems it was not clocked normalized Raptor Cover IPC.
It was.
So what is Skymont IPC actually like clock normalized? Is it like Zen 3, a bit better than Zen 3 but behind Zen 4 or like Zen 4. Overall of course. I know it probably depends on workload. But in your opinion what is its clock normalized Skymont IPC like.
It's on Golden Cove level just like they said. The confusion is because on Lunarlake, Skymont is optimized for low power and is hampered by the slow memory subsystem. Also I have to wonder there's some sort of denial on P cores being really sucky and on the verge of replacing? How come barely any sites test E vs P?

Arrowlake's version is an incredible 20%+ faster per clock compared to the one in Lunarlake.


That's a 5.7GHz 7950X vs 4.6GHz Arrowlake E core. 24% clock advantage results in Zen 4 being 19.3% faster in Int and 18.4% faster in FP. Assuming 90% scaling, it's 2-3% faster per clock than Zen 4.

Another thing is Zen 5C in Ryzen AI 9 HX 370 is only about 10% faster than Lunarlake's Skymont, despite LNL's version being significantly hampered: https://chipsandcheese.com/p/skymont-intels-e-cores-reach-for-the-sky?utm_source=publication-search

It's an indication mobile platforms are noticeably slower than desktop ones, even per clock. ARL's Skymont matches LNL's Lion Cove per clock.
 
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gdansk

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It varies by workload. In SPECint 2017 rate-1 Skymont as found in the 265K is about the same IPC as Cortex A720.
 
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DavidC1

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A78 = 1
A710 = 1.1(8MB vs 4MB)
A715 = 1.215
A720 = 1.397
X1 = 1.215
X2 = 1.34
X3 = 1.47
X4 = 1.62
X925 = 1.86

So Skymont, Golden Cove, and Zen 4 is ballpark A720/X3. Which means Lion Cove is X3/X4.

So this puts things into perspective. When I said x86 advances, especially Skymont seems impressive, but a mobile core going in a handheld device is 30% faster, and it's still almost 20% faster compared to the 250W desktop chips.

This is also in line with the spirit of Moore's Law, which benefits cheaper computers, and more power efficient devices more.
 

Wolverine2349

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Oct 9, 2022
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It was.

It's on Golden Cove level just like they said. The confusion is because on Lunarlake, Skymont is optimized for low power and is hampered by the slow memory subsystem. Also I have to wonder there's some sort of denial on P cores being really sucky and on the verge of replacing? How come barely any sites test E vs P?

Arrowlake's version is an incredible 20%+ faster per clock compared to the one in Lunarlake.


That's a 5.7GHz 7950X vs 4.6GHz Arrowlake E core. 24% clock advantage results in Zen 4 being 19.3% faster in Int and 18.4% faster in FP. Assuming 90% scaling, it's 2-3% faster per clock than Zen 4.

Another thing is Zen 5C in Ryzen AI 9 HX 370 is only about 10% faster than Lunarlake's Skymont, despite LNL's version being significantly hampered: https://chipsandcheese.com/p/skymont-intels-e-cores-reach-for-the-sky?utm_source=publication-search

It's an indication mobile platforms are noticeably slower than desktop ones, even per clock. ARL's Skymont matches LNL's Lion Cove per clock.

So basically Skymont IPC is actually that good, but its implementation on Arrow Lake was so bad as the rest of Arrow Lake memory subsystem and tile to tile latency that its all for naught just like its gaming performance collapsed big time vs Raptor Lake.
 

DavidC1

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So basically Skymont IPC is actually that good, but its implementation on Arrow Lake was so bad as the rest of Arrow Lake memory subsystem and tile to tile latency that its all for naught just like its gaming performance collapsed big time vs Raptor Lake.
There are many small decisions that are made that we will never know and will affect variables such as quality of the silicon, which determines things like yield and how high it can be clocked.

Remember, Arrowlake was supposed to be BEFORE Lunarlake. So instead of Raptorlake refresh, it should have been Arrowlake. Delays happen because the teams couldn't meet design goals and spent extra time trying to meet them. 99% of the time, delays usually end up making it worse than the design goal.

Meteorlake was delayed too(and mediocre), thus we got Raptorlake. Think of how messed up that is. Arrowlake couldn't effectively succeed a refresh of a part(Raptorlake) that was rushed to replace the previous failure(Meteorlake).
 

Wolverine2349

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There are many small decisions that are made that we will never know and will affect variables such as quality of the silicon, which determines things like yield and how high it can be clocked.

Remember, Arrowlake was supposed to be BEFORE Lunarlake. So instead of Raptorlake refresh, it should have been Arrowlake. Delays happen because the teams couldn't meet design goals and spent extra time trying to meet them. 99% of the time, delays usually end up making it worse than the design goal.

Meteorlake was delayed too(and mediocre), thus we got Raptorlake. Think of how messed up that is. Arrowlake couldn't effectively succeed a refresh of a part(Raptorlake) that was rushed to replace the previous failure(Meteorlake).

Raptor Lake is actually a darn good product latency and input better than 9800X3D for gaming. If only degradation was under control which it may now be with the microcode updates and better binning and newer production batches.
 

511

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There are many small dec 🤣 sions that are made that we will never know and will affect variables such as quality of the silicon, which determines things like yield and how high it can be clocked.

Remember, Arrowlake was supposed to be BEFORE Lunarlake. So instead of Raptorlake refresh, it should have been Arrowlake. Delays happen because the teams couldn't meet design goals and spent extra time trying to meet them. 99% of the time, delays usually end up making it worse than the design goal.

Meteorlake was delayed too(and mediocre), thus we got Raptorlake. Think of how messed up that is. Arrowlake couldn't effectively succeed a refresh of a part(Raptorlake) that was rushed to replace the previous failure(Meteorlake).
Arrow Lake delay was partly on TSMC as well due to N3B being delayed by 6 month combined with Intel delays and we got it 1 year after when we were supposed to get it but it wouldn't change the fact that RPL would still have been superior in gaming.
A78 = 1
A710 = 1.1(8MB vs 4MB)
A715 = 1.215
A720 = 1.397
X1 = 1.215
X2 = 1.34
X3 = 1.47
X4 = 1.62
X925 = 1.86
where is this data from?
Raptor Lake is actually a darn good product latency and input better than 9800X3D for gaming. If only degradation was under control which it may now be with the microcode updates and better binning and newer production batches.
it's hilarious sometimes that an accident generation is more competitive than a planned generation.
 
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DavidC1

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Arrow Lake delay was partly on TSMC as well due to N3B being delayed by 6 month combined with Intel delays and we got it 1 year after when we were supposed to get it but it wouldn't change the fact that RPL would still have been superior in gaming.
Lunarlake is also N3B
where is this data from?
You take ARM data, starting with A78.
it's hilarious sometimes that an accident generation is more competitive than a planned generation.
Yes... but the degradation.
 

511

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Based on that graph is Spec CPU 2017 clock normalized. I imagine it is.

So in that case Skymont IPC is roughly on par with Zen 3 or barely within margin of error 1% to 2.5% behind.
This is not normalized clock this is peak clock normalized this is clock normalized
 

Wolverine2349

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This is not normalized clock this is peak clock normalized this is clock normalized
View attachment 125795

Based on that chart it still looks almost on par wit Zen 3 overall, Though some workloads Skymont wins and some Zen 3 wins?

Am I missing anything?

They are clocked only 100MHz difference?

Oh wait Skymont 4600 5800X3D Zen 3 4500 and 5950X Zen 3 4900
 
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DavidC1

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Based on that graph is Spec CPU 2017 clock normalized. I imagine it is.

So in that case Skymont IPC is roughly on par with Zen 3 or barely within margin of error 1% to 2.5% behind.
I wouldn't call Huang's tests particularly good, not the big one anyways. 13900K's P core gets 1.98, meaning it's just 6% faster than Zen 3, which is not the case. Golden Cove is actually if anything very slightly faster than Zen 4, which got 13% over Zen 3.

Also the desktop Skymont is only 13% higher than Lunarlake version, which is also too low.

I suspect he has difficulty really fully making it ISO-clock. Hence why I say compared to peak AT days modern reviewers, the best of them are second tier.
 
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MS_AT

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This is not normalized clock this is peak clock normalized this is clock normalized
I am not sure I understand. The table shows the peak clock performance and PPC. The graph showed peak clock performance. Is this what you meant?
I suspect he has difficulty really fully making it ISO-clock. Hence why I say compared to peak AT days modern reviewers, the best of them are second tier.
Andrei was using the same methodology. Measure at peak clock, then normalize back instead of measuring at fixed clock. Or do you mean other things?
 
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511

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Jul 12, 2024
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I am not sure I understand. The table shows the peak clock performance and PPC. The graph showed peak clock performance. Is this what you meant?
Yes
Andrei was using the same methodology. Measure at peak clock, then normalize back instead of measuring at fixed clock. Or do you mean other things?
Well tbh it's impossible to do fixed clock measuring on ARM platform cause they don't provide with the tools.
 
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