Question Zen 6 Speculation Thread

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Josh128

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Oct 14, 2022
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All in all, I think that the new IOD and faster memory speeds are going to be the biggest improvements we see in Zen 6 platforms next year.

I am actually not expecting much in the way of IPC of Zen 6 over Zen 5 (10-15%) and little or no increase in clock speed. In more bandwidth limited operations (likely in DC applications / HPC /AI) much larger increases in performance will be seen than the IPC bump. At a minimum, we can expect the larger core counts will result in higher performance. The IPC and bandwidth increases would then be on top of that.

Zen 6 Venice should be a very powerful platform indeed.

That will be true for ST, but not for MT. Much like Zen 3>Zen4, the process node change should allow for MUCH higher MT all core clocks than current 4nm Zen 5, which actually clocks lower than Zen 4 in all core R23 runs.

So while AMDs own leaked MLID slide claimed +~10% IPC for Zen 6, I think we are looking at significantly increased all core clocks when comparing say, 16 core Zen 6 to 16 core Zen 6 at the same 170W TDP.

So in the end, it seems Zen 6 will reap the the benefits of Zen 2 to Zen 3 (increased size CCX), and Zen 3 to Zen 4 (much higher core for core MT freq).
 
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Josh128

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Out of curiosity, at what power limits?
I think if both are limited to 230W, I think 9950X limits to around 150- 200MHz per core lower compared to 7950X in R23 or R24. I dont know the exact numbers, and it depends on the workload, but its at least a bit lower across the board.

Here at GN its around 100MHz or so lower in the Blender test.
 
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CouncilorIrissa

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Jul 28, 2023
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I think if both are limited to 230W, I think 9950X limits to around 150- 200MHz per core lower compared to 7950X. I dont know the exact numbers, but its lower.
That's the thing that gets people tripped up with Granite Ridge: the PPT no longer follows the 1.35*TDP "rule". The 9950X PPT is 200w. Hence the ~100 MHz lower clock speeds.

edit: removed the wrong ppt image
Later in the same video you can see the ~30w delta measured between 7950x and 9950x
 
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LightningZ71

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Absolutely. Of course, for many of the benchmarks being quoted, the transfers are artificially large in order to explicitly ensure that it will come from main memory.

In real world applications, I think that this is rarely the case and quite a bit of memory access is kept local within one of the levels of cache thus preventing a main memory access. Additionally, the specific memory elements in cache are frequently accessed repetitively.

All in all, I think that the new IOD and faster memory speeds are going to be the biggest improvements we see in Zen 6 platforms next year.

I am actually not expecting much in the way of IPC of Zen 6 over Zen 5 (10-15%) and little or no increase in clock speed. In more bandwidth limited operations (likely in DC applications / HPC /AI) much larger increases in performance will be seen than the IPC bump. At a minimum, we can expect the larger core counts will result in higher performance. The IPC and bandwidth increases would then be on top of that.

Zen 6 Venice should be a very powerful platform indeed.
The biggest improvement for desktop Zen6 over Zen 5 will be the foundry node. Going from N4P to N2P is a big jump in area inside the node triangle (efficiency, performance, density). This should lead to considerably gains in efficiency with respect to watts consumed at a given clock frequency over time. That typically translates to a big jump in MT performance due to higher sustained clocks across all active cores. So long as they aren't memory bandwidth bound, MT tasks should improve well.
 

Josh128

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Oct 14, 2022
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The biggest improvement for desktop Zen6 over Zen 5 will be the foundry node. Going from N4P to N2P is a big jump in area inside the node triangle (efficiency, performance, density). This should lead to considerably gains in efficiency with respect to watts consumed at a given clock frequency over time. That typically translates to a big jump in MT performance due to higher sustained clocks across all active cores. So long as they aren't memory bandwidth bound, MT tasks should improve well.
Are there any credible sources claiming that it will use N2P for desktop? I think its more possible that desktop could use N3P or N3X?
 

LightningZ71

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N3X for a product that will likely see mobile duty doesn't make sense. Talking about the CCDs, N2/P makes the most sense. The IOD and the successor to Kraken will likely be on an N3 family node. Rumor has it that Kraken is provisioned to connect a CCD, which will likely be on N2/P.
 
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OneEng2

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Sep 19, 2022
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Are there any credible sources claiming that it will use N2P for desktop? I think its more possible that desktop could use N3P or N3X?
I agree; however, I think you will find that the vast majority of forum members believe it will be N2.

I think that AMD could keep to near their current die size and go to a 12 core CCD just by moving from N4P to N3P.

To answer your question directly, I don't believe there is any proof or statements from AMD that conclude that the desktop Zen 6 will be on N2.
 
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