Discussion RDNA 5 + CDNA 4 Architectures Thread

Kronos1996

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Dec 28, 2022
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Now seems like a good time to start this discussion thread. Per AMD’s earnings call yesterday, CDNA 4 is coming out mid-2025. MI350 sounds like it uses the new architecture with the same packaging/platform while MI400 is a top to bottom redesign.

RDNA 5 seems to be 18 months away minimum (late 2026 launch per leaked roadmaps.) Still, they should have the architecture locked in. Might get some info on the dies later this year when they start tape-out’s.

My main question is if these two architectures are the first step in the UDNA merge? Same base architecture heavily customized for gaming and server. Essentially what Nvidia’s been doing for years.

Not that dissimilar to AMD’s approach with Zen either. Classic core, Dense Core and modular add-ons like X3D. They can add/remove IP like AVX-512 depending on the market. Most importantly, all the variants are software compatible.

It sounds like they want to take a similar approach with UDNA. Unified software stack for a unified base architecture. My guess is, a new modular CU. Then they can insert whatever IP is appropriate for each product line. Rasterization + RT hardware for gaming. The whole shopping list of AI instructions for datacenter. Optimized density for each depending on the clock-speed targets.

David Wang made remarks about how changing the cache system resets software optimization to zero. Is it safe to assume both products lines will share a similar memory system design?
 
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marees

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There is a one / one-and-a-half year gap between CDNA 4 & RDNA 5

So maybe the one after CDNA 4 could be the UDNA version ??
 

Kronos1996

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Dec 28, 2022
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There is a one / one-and-a-half year gap between CDNA 4 & RDNA 5

So maybe the one after CDNA 4 could be the UDNA version ??
Could be yeah. I thought MI350 was a relatively new addition and they originally planned CDNA 4 to debut with MI400? If that’s the case, then CDNA 4’s launch has been moved up considerably.
 

GTracing

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Aug 6, 2021
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My main question is if these two architectures are the first step in the UDNA merge?
There is a one / one-and-a-half year gap between CDNA 4 & RDNA 5

So maybe the one after CDNA 4 could be the UDNA version ??
Jack Huynh hinted that the RDNA5/CDNA4 generation won't be fully unified when he announced the UDNA name. It sounds like it will called UDNA regardless of whether RDNA and CDNA are merged into one architecture or not.
PA: So, this merging back together, how long will that take? How many more product generations before we see that?

JH: We haven’t disclosed that yet. It’s a strategy. Strategy is very important to me. I think it’s the right strategy. We’ve got to make sure we’re doing the right thing.
 
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basix

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Oct 4, 2024
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MI400 should already be CDNA5. So maybe RDNA6 & CDNA5 = UDNA? Huynh mentioned framed it as a cloud-to-client strategy, which wold match that. CDNA5 is first and RDNA6 follows. RDNA5 could be still somewhat close to RDNA2 which might be better for next-gen consoles also.
 

CakeMonster

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If this is the basis for hardware in the next gen consoles I really hope they can cram as much 'universal' hardware units as possible in there so that it will run future stuff we can come up with as AI models are trained in 1-2-5 years, similar to transformer based upscaling now running on 2018 Turing hardware.
 
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rommelrommel

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If this is the basis for hardware in the next gen consoles I really hope they can cram as much 'universal' hardware units as possible in there so that it will run future stuff we can come up with as AI models are trained in 1-2-5 years, similar to transformer based upscaling now running on 2018 Turing hardware.

The transformer model runs on Turing, but so poorly you won't use it.
 
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marees

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CDNA4 also brings native support for FP6 and FP4 data types to AMD’s accelerators for the first time. One of the marquee features of rival NVIDIA’s Blackwell architecture, FP6 and FP4 have become a new target for AI inference, as developers look to wring every TOP/FLOP of performance from these expensive and power-hungry GPUs. And, aiming to one-up NVIDIA at their own game here, AMD has even beefed up FP6 performance on their architecture so that it processes at twice the rate of FP8, unlike NVIDIA’s architecture where it processes at the same rate as FP8. AMD in essence built a better FP4 unit to support FP6, rather than reusing an FP8 unit to support FP6. This carries a die area penalty, but the upshot is double the performance.


 

marees

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marees

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a major differentiator for MI350 is that FP6 is the same rate as FP4. Can you talk a little bit about how that was accomplished and why that is?

Alan: Sure, yep, so one of the things that we felt like on MI350 in this timeframe, that it’s going into the market and the current state of AI… we felt like that FP6 is a format that has potential to not only be used for inferencing, but potentially for training. And so we wanted to make sure that the capabilities for FP6 were class-leading relative to… what others maybe would have been implementing, or have implemented. And so, as you know, it’s a long lead time to design hardware, so we were thinking about this years ago and wanted to make sure that MI350 had leadership in FP6 performance. So we made a decision to implement the FP6 data path at the same throughput as the FP4 data path. Of course, we had to take on a little bit more hardware in order to do that. FP6 has a few more bits, obviously, that’s why it’s called FP6. But we were able to do that within the area of constraints that we had in the matrix engine, and do that in a very power- and area-efficient way.

 
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