Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

DisEnchantment · Apr 24, 2020

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

N7 performance is more or less understood.

This year and next year TSMC is mainly increasing capacity to meet demands.

TSMC Radically Boosts CapEx to Expand Production Capacities, To Reach $14B For 2019

www.anandtech.com

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

Samsung’s Aggressive EUV Plans: 6nm Production in H2, 5nm & 4nm On Track

www.anandtech.com

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE

Io Magnesso · Jun 17, 2025

poke01 said:
View attachment 125835
Projected N2 demand.

Source : Jukan choi

No matter what, isn't Qualcomm's prediction of wafer demand too big?

DavidC1 · Jun 17, 2025

poke01 said:
That’s a decent chunk for Intel, isn’t N2 supposed be used only for compute tiles on 2 SKUs??

That does seem to unfortunately match claims that even 14A isn't doing well.

Io Magnesso · Jun 17, 2025

There is also talk of reducing the number of employees on the Intel Foundry side.
I still don't know the truth... It's just that the Foundry CEO sent an email to an employee.
Resend email
Foundry alone is unlikely to reduce personnel by 15-20%.
Of course, Foundry also has middle managers, so maybe they want to reduce it as much as possible. It is unthinkable to reduce the number of people who actually run manufacturing equipment, not middle managers.

poke01 · Jun 17, 2025

Io Magnesso said:
No matter what, isn't Qualcomm's prediction of wafer demand too big?

It’s likely 8 Elite 3, mobile is huge in Asia

Io Magnesso · Jun 17, 2025

DavidC1 said:
That does seem to unfortunately match claims that even 14A isn't doing well.

Maybe so
However, it is a little questionable that AMD's N2 demand forecast is less than Intel's N2 demand forecast.
Well, 14A is a generation ahead of TSMC A16, so let's see how it goes.

DavidC1 · Jun 17, 2025

What Intel needs is a cultural change, which is extremely difficult, if not close to impossible to do from a culture that has been rotten for decades.

It just sounds like when they were trying to catch up to ARM by forcing products out regardless of whether the validation was complete or not. Sure they were much slower than others at validation, but forcing it out makes it worse.

In this case what they needed was a idea/paradigm change on how the validation is done, problems which were partly revealed when Keller was at Intel.

If you have someone who's been a druggie for decades, you think just cutting out 15% of his lifestyle is going to fix it? No, it requires a near unrecognizable overhaul.

Io Magnesso said:
Maybe so
However, it is a little questionable that AMD's N2 demand forecast is less than Intel's N2 demand forecast.
Well, 14A is a generation ahead of TSMC A16, so let's see how it goes.

Because Intel still does have a huge volume advantage especially in client, and it's also their second year of N2 according to the graph, while it's AMD's first.

Io Magnesso · Jun 17, 2025

DavidC1 said:
What Intel needs is a cultural change, which is extremely difficult, if not close to impossible to do from a culture that has been rotten for decades.

It just sounds like when they were trying to catch up to ARM by forcing products out regardless of whether the validation was complete or not. Sure they were much slower than others at validation, but forcing it out makes it worse.

In this case what they needed was a idea/paradigm change on how the validation is done, problems which were partly revealed when Keller was at Intel.

If you have someone who's been a druggie for decades, you think just cutting out 15% of his lifestyle is going to fix it? No, it requires a near unrecognizable overhaul.

Because Intel still does have a huge volume advantage especially in client, and it's also their second year of N2 according to the graph, while it's AMD's first.

Once you've reached this stage, you can't avoid some pain...
However,If that change can be achieved with a very small number of personnel, or even does not require personnel reductions That's much better
Even if we reduce the number of personnel, it is not something that will be reduced at random immediately.
I have to think about it
There will be a gap in the work I've done so far.
This is true whether the job is necessary or unnecessary, and even if it is a job that pays well.

Doug S · Jun 18, 2025

poke01 said:
It’s likely 8 Elite 3, mobile is huge in Asia

I can't see Qualcomm's market share in Asia doing anything but falling, given that Chinese OEMs and ODMs are going to want to cut them out both as a knock-on effect of US sanctions against Chinese companies and looking for alternatives to Qualcomm's ever more expensive SoCs in ex-China Asian markets.

del42sa · Jun 18, 2025

https://wccftech.com/intel-18a-proc...-frequency-36-percent-lower-power-vs-intel-3/

poke01 · Jun 18, 2025

del42sa said:
https://wccftech.com/intel-18a-proc...-frequency-36-percent-lower-power-vs-intel-3/

View attachment 125844

who cares abput Intel 3.......

How does it compare to N3B

Io Magnesso · Jun 18, 2025

poke01 said:
who cares abput Intel 3.......

How does it compare to N3B

That's a difficult Question
I think it depends on what kind of cell configuration of N3B to be compared with.
I think Intel 3 will at least compete with the N3B HP library.

511 · Jun 18, 2025

Someone missed interesting slides

poke01 said:
That’s a decent chunk for Intel, isn’t N2 supposed be used only for compute tiles on 2 SKUs??

Likely wrong tbh they don't need this much considering it's just 8+16/8+16 bLLC and NVL Halo iGPU iirc.
AMD and Intel must have swapped that would seem correct.
There was this leak as well

jpiniero · Jun 18, 2025

511 said:
Likely wrong tbh they don't need this much considering it's just 8+16/8+16 bLLC and NVL Halo iGPU iirc.
AMD and Intel must have swapped that would seem correct.
There was this leak as well

If you look, the AMD graph on the earlier slide is about 10k wpm in 2026... so that does match.

As for Intel, maybe they've expanded the scope to other dies. Which is crazy given the cost structure but maybe it's cheaper than spending $40B on 14A?

511 · Jun 18, 2025

jpiniero said:
If you look, the AMD graph on the earlier slide is about 10k wpm in 2026... so that does match.

This is WPY divide it by 12
AMD ~8.3k wafer/month
Intel ~2.5K wafer/month
If you swap both than both numbers makes sense

jpiniero said:
As for Intel, maybe they've expanded the scope to other dies. Which is crazy given the cost structure but maybe it's cheaper than spending $40B on 14A?

Whoever is spreading this rumor is false they can't magically increase scope of types of die 1 year prior to launch if it was 2-3 years ago it would have made sense but now.

soresu · Jun 20, 2025

Saw this imec roadmap in a video from Ian Cutrress and noticed something nu in the back-side interconnect thing I'd never seen before:

"Local signal lines"

Wonder if this is moving from purely power delivery to IO/data as well?

Edit: It's not labeled as such, but I think the different icon under Nanosheet "Extended" is Forksheet.

soresu · Jun 20, 2025

Hmmm, seems the exact shape of the forksheet move is still in question:

Outer wall forksheet: bridging nanosheet and CFET | imec

The outer wall forksheet is an attractive option for the semiconductor industry to extend the nanosheet era to the A10 node, in anticipation of the CFET.

www.imec-int.com

dangerman1337 · Jun 21, 2025

CFET doubling density (Logic, SRAM and maybe I/O as well? GPU Memory bit busses being halved would allow some funky stuff like SoCs on gaming handhelds) sounds damn cool. But the wafer prices sadly will probably be very pricey. I can see A7 or A5 nodes having a Zen 9+ doing 32 Cores on a CCD in a huge leap as a Zen 2 type generation.

511 · Jun 21, 2025

CFET Doubles SRAM Density as well

dangerman1337 · Sunday at 10:11 AM

511 said:
CFET Doubles SRAM Density as well

Yeah meant to mention SRAM instead of just "density". That's why I can see an Zen CCD on A5 doing 32 Cores w/ 128MB Cache, if Zen 7 is A14 (without SPR) can do 16 Cores w/ 64M Cache then it's very easy to see A5 doing 32 Cores, maybe even A7 if that doubles density over A10.

I actually suspect with the PS6 being 2027 using N3X (at least with some Compute tile SoC if it's chiplet-ish based with a 6nm cache of sorts) it seems, I wonder if PS7 is 2035 on a A5 SoC with CFET? Makes sense to me.

511 · Sunday at 10:13 AM

dangerman1337 said:
Yeah meant to mention SRAM instead of just "density". That's why I can see an Zen CCD on A5 doing 32 Cores w/ 128MB Cache, if Zen 7 is A14 (without SPR) can do 16 Cores w/ 64M Cache then it's very easy to see A5 doing 32 Cores, maybe even A7 if that doubles density over A10.

I actually suspect with the PS6 being 2027 using N3X (at least with some Compute tile SoC if it's chiplet-ish based with a 6nm cache of sorts) it seems, I wonder if PS7 is 2035 on a A5 SoC with CFET? Makes sense to me.

If I have to make PS6 I would use N3C

Doug S · Sunday at 4:51 PM

Question for the EEs/process guys/designers.

For the purpose of this exercise let's assume China has no access to anything better than their current DUV and thus is limited to 7nm/5nm type processes at least through the end of the decade if not beyond. I wonder how much they could advance despite that.

GAA is not primarily enabled by EUV, but how great of a benefit would GAAFET be if you were stuck at 5nm? GAAFET helps with power reduction, so it might be useful even if you didn't get any shrink. But would you get NO shrink, or would you be able to get some shrink from GAA even if you were stuck at 5nm? How about CFET?

We could throw in BSPDN here too. That's obviously something you could do, and get benefit from, at 5nm. Seems to me that the making the front side metal layers a bit simpler might help a 5nm process get more benefit from GAAFET or CFET transistors. Or am I off base with my mostly uninformed speculation there?

511 · Monday at 3:43 AM

https://twitter.com/x/status/1935559937616470440

DavidC1 · Monday at 6:45 AM

Doug S said:
Or am I off base with my mostly uninformed speculation there?

This assumes that there's only one way beyond DUV, which if you look at history of technological advances is not the case. "Necessity is the mother of invention". If/when they really need it, they'll find another way.

China has 10x the amount of startups and similarly high amount of graduates of USA.

I would argue high population is one key for technological advancement. The reason is that you can't force everyone on one area, some will just not care and work on other things. So increased amount of people results in natural advancement.

You can't have AI/Crypto without the Internet. You can't have Internet without advanced computers. You can't have computers without electronics. You can keep going down to the basic level such as metal smelting, wood fires, food production. They are always needed of course, but you can't have the higher levels without them.

511 · Monday at 6:47 AM

China will be able to do it but it's impossible to estimate by which timeframe

DavidC1 · Monday at 6:52 AM

When you have an order of magnitude higher amount of new startups and university graduates, over long enough period it'll result in newer ideas. It's just a matter of time.

10-20 years, if Nuclear War doesn't obliterate the planet, China will take firm lead in the last area US has lead in now, which is semiconductors.

Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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