- Sep 13, 2008
- 8,098
- 3,035
- 146
I am mostly curious, how many boards will have integrated 10Gb LAN? Hopefully that is a more common thing soon.
I am mostly curious, how many boards will have integrated 10Gb LAN? Hopefully that is a more common thing soon.
I am mostly curious, how many boards will have integrated 10Gb LAN? Hopefully that is a more common thing soon.
intel boards are usually bundled with Intel Ethernet controllersThere is this new cheaper 10 GbE chip from Realtek coming soon:
Question - Realtek 10 GbE network adapter chip for $10 in 2025
Looks like we're finally about to get affordable 10 GbE network adapters. Realtek will be releasing such a chip for only $10 in 2025 according to this article: https://www.tomshardware.com/networking/realteks-usd10-tiny-10gbe-network-adapter-is-coming-to-motherboards-later-this-year The model...forums.anandtech.com
Hopefully that means it’ll become more common on motherboards going forward.
There is this new cheaper 10 GbE chip from Realtek coming soon:
Question - Realtek 10 GbE network adapter chip for $10 in 2025
Looks like we're finally about to get affordable 10 GbE network adapters. Realtek will be releasing such a chip for only $10 in 2025 according to this article: https://www.tomshardware.com/networking/realteks-usd10-tiny-10gbe-network-adapter-is-coming-to-motherboards-later-this-year The model...forums.anandtech.com
Hopefully that means it’ll become more common on motherboards going forward.
That would actually make sense, finally.
The halo chip may not get bLLC?
They are using foveros and the physical limit for Foveros is Full Wafer. It's impossible they couldn't fit two 100mm2 plus few other dies of around 30-40mm2 on a single wafer.They likely couldn't physically fit two CCDs on the same package if one of them was a large cache version. Current rumor is that the large cache isn't "stacked" but on the die with the cores.
The halo chip may not get bLLC?
It's ridiculous that the SOC and GPU tiles are made with a high cost of 18AThe account on X called Haze is not a leaker. Read his track record, just some random retweet and uncertain info with no source.
For latest reliable info about bLLC, Exist50 on reddit seems so sure that bLLC won't be on NovaLake, maybe until RazerLake.
He also doesn't seem very sure. I guess it's up to Intel how serious they are competing with ZenX3D chips. If they are able to put out at least an 8+16 core SKU with bLLC several months before Zen6X3D, they could take the gamer market by storm.For latest reliable info about bLLC, Exist50 on reddit seems so sure that bLLC won't be on NovaLake, maybe until RazerLake.
They gotta eat the cost if they want to learn the ropes making these things in-house.It's ridiculous that the SOC and GPU tiles are made with a high cost of 18A
At least the GPU tile, which has a lot of XE cores for mobile use, may use the most advanced nodes. I don't think a mere desktop GPU tile will use such a cutting edge process.It's ridiculous that the SOC and GPU tiles are made with a high cost of 18A
Even if it is made in-houseYou don't need to go out of your way to create a GPUTile for desktop use with cutting edge 18AThey gotta eat the cost if they want to learn the ropes making these things in-house.
Raichu said bLLC is with two compute die variant we should ask the AIO Leaker in the forum.The account on X called Haze is not a leaker. Read his track record, just some random retweet and uncertain info with no source.
For latest reliable info about bLLC, Exist50 on reddit seems so sure that bLLC won't be on NovaLake, maybe until RazerLake.
It's not tbh if you are talking about tiles 60mm2 large and iGPU Tile will be roughly 20-30mm2 at such a small size it's not costlyIt's ridiculous that the SOC and GPU tiles are made with a high cost of 18A
Intel Advanced Accounting™.They gotta eat the cost if they want to learn the ropes making these things in-house.
It's not like that they are reusing design from the Xe3P iGPU lol they won't have to make the iGPU on separate node.Even if it is made in-houseYou don't need to go out of your way to create a GPUTile for desktop use with cutting edge 18A
I think Intel 3 from a generation ago is enough
I feel that it is important for Intel to do it for their NVL-HX chips. Intel does not have any new discrete GPU for laptops--they need something with good performance but low power. Plus, a tiny tile is perfect for breaking in a new node.Even if it is made in-houseYou don't need to go out of your way to create a GPUTile for desktop use with cutting edge 18A
I think Intel 3 from a generation ago is enough
They never went out of their way they shared so many things on 18A/18AP IP wise.Sorry, I'm not saying I'm designing the architecture from its location.
What I wanted to say is, regardless of architecture It was an opinion that there is no need to go out of your way to manufacture an IGPU for desktop with Intel 18A.
I know 18A/18AP is compatibleThey never went out of their way they shared so many things on 18A/18AP IP wise.
And Xe3P is a GPU IP For this processI know 18A/18AP is compatible
I've never heard of XE3P being an architecture (IP) dedicated to Intel 18A. That information is interestingAnd Xe3P is a GPU IP For this process
It comes down to a Raichu rumor. Then people extrapolate it to be 18A. The timing makes sense especially if 18A is not being as utilized as Intel hoped by 3rd parties. 18A would have 29% fewer masks and if the equipment is underutilized this is a win-win for salvaging the underutilized equipment and personnel. I suspect Intel would rather sell that equipment time, but this is their backup option.I've never heard of XE3P being an architecture (IP) dedicated to Intel 18A. That information is interesting