By the 16-bit to 32-bit migration, we moved from segmented addressing to flat linear address space. This was really the big thing. But also since we were actually introducing a new software format, the opportunity could be taken to also introduce a number of other modern features, like preemptive multitasking, multithreading, non serialized message qeues, real virtual memory, strong memory protection. All in all, a very nice migration that made the PC as pleasant to work with as other platforms.Originally posted by: oralpain
Originally posted by: Vee
Well, that sounds a bit strange. But it's all up to judgement. Anyway, there's no technical similarities between the 16 to 32 bit migration and the 32 to 64 bit migration. Two completely different things.
How are they that much different? It's basically the same idea. Going from 16-bit to 32-bit registers and address space should be quite similar to going from 32-bit registers and address space to 64-bit (though the a64/opteron only has 40-bit addressing it should not be a limit that will be reached any time soon).
With the 32-bit to 64-bit migration, we are doing none of those things. We already have linear process space and all the other stuff. This time the essential detail is that we are removing the 2GB limit on process space. Compare it to when the '286, and DPMI and Windows16 software removed the 8086/MSDOS 640KB barrier instead. Because that's where we are again.
It's important to understand that this is NOT about physical RAM addressing! The '386 addressing scheme as employed by our 32-bit cpus, allow, I think, addressing 64GB physical RAM! This is of no use for our current problem. Because it's the program's space to live in, with all things, including useless gaps between blocks of sequential addresses, that is limited to 2GB! The total amount of numbers it can use for every byte. And please note that this space becomes fragmented, so the problem is more severe than it may immediately sound.
The address space of X86-64 is not 40 bits or one Terabyte. It is 64 bits or 16 Exobytes! Currently announced implementations' (real cpus), memory managers allow mappings of 52-bits or 4 Petabytes to effective addresses. The 40 bits you're talking about are just the physical addressing. And 1 Terabyte seem quite sufficient for a while. But X86-64 is by no means limited to 40-bit physical addressing. That's just how current cpus are made.
Then, when we are going to have to change the ISA and binary format of software, we might just change a few other things, from the old '386, as well. That's why we also get more flexible registers, which should give performance a boost. How much remains to be seen, but I'm sure there are excellent opportunities for optimizations.