AMD zen pre-release thread!

[Enigmoid]

Fritz is not an overall indication of integer performance. One test is not good enough. It requires a variety of tests. You still don't get it. You simply can't substitute a similar program. You need a completely different program sometimes.

Personally I do not understand your tone. I don't care which does better. I'm not for AMD or intel. I'm simply saying that Fritz is a terrible test (I'm comparing ST so MT benches of Houdini and such don't work as the effect of CMT or HT isn't shown and that really makes or beaks HW or PD).

Low IPC tests are worst case scenarios for big cores. That is by no means a best or even average case scenario.

 

[Abwx]

Fritz is not an overall indication of integer performance. One test is not good enough. It requires a variety of tests. You still don't get it. You simply can't substitute a similar program. You need a completely different program sometimes.

Personally I do not understand your tone. I don't care which does better. I'm not for AMD or intel. I'm simply saying that Fritz is a terrible test (I'm comparing ST so MT benches of Houdini and such don't work as the effect of CMT or HT isn't shown and that really makes or beaks HW or PD).

Low IPC tests are worst case scenarios for big cores. That is by no means a best or even average case scenario.

In Fritz HW uarch has 41.5% better IPC than a Piledriver, in Houdini the number is in the 35%, like in 7 Zip.

The effect of CMT is known, hardware.fr made tests to check the CMT scalings, these are the numbers with the first BD, the numbers can be corrected using their Vishera review since they made a clock/clock comparison with the FX8350.

Zambezi CMT scalings :

http://www.hardware.fr/articles/842-9/efficacite-cmt.html



Zambezi/Vishera clock/clock :

http://www.hardware.fr/articles/880-6/bulldozer-vs-piledriver-4-ghz.html

 

[Enigmoid]

I'm not going to argue schemantics. Either way there are better integer applications.
x264 is pretty decent

 

[erunion]

These two CPU microarchitectures will be, in the words of CTO Mark Papermaster, "sister cores."

Yet another TR journalist opinion.?.

Be ready to get your pathetic prevision, not to say fud, bursted.

Of course the k12 and Zen are sister cores. But how does that prove Zen is high performance? It doesn't, it proves the opposite even.

That's the whole the point. You have the facts but are incapable of coming to a correct conclusion.

 

[monstercameron]

Of course the k12 and Zen are sister cores. But how does that prove Zen is high performance? It doesn't, it proves the opposite even.

That's the whole the point. You have the facts but are incapable of coming to a correct conclusion.

correct conclusions are about 1.5yrs away...

 

[Abwx]

Of course the k12 and Zen are sister cores. But how does that prove Zen is high performance? It doesn't, it proves the opposite even.

That's the whole the point. You have the facts but are incapable of coming to a correct conclusion.

Skybridges for ARM and X86 are the small cores, why would they design two other small cores with K12 and Zen..??.

And why devellopping an ARM core better than the A57, they could just wait for the soon to be released new ARM cores, why bother doing their own design.?.

What is your interpretation of thoses words :

AMD's execs noted that these are high-frequency, high-performance CPU cores that will span the range from laptops to desktops to servers—and not just "microservers."

http://techreport.com/review/26418/amd-reveals-k12-new-arm-and-x86-cores-are-coming

This is clear, high performance means high performance and nothing else, i guess that you should question yourself about the ability to come to the correct conclusion...

 

[Abwx]

I'm not going to argue schemantics. Either way there are better integer applications.
x264 is pretty decent

This does change nothing overall, Vishera is good in such apps and Steamroller got its better IPC improvements precisely in X264 encoding (16% at Hfr), benches in X264 and X265 yield about the same results as other Integer benches for Vishera :

http://www.hardware.fr/focus/99/amd-fx-8370e-fx-8-coeurs-95-watts-test.html

Now some people will find tiresome that i m relying forever on Hardware.fr benches, thing is that, contrary to most sites, they published an accurate description of their protocols with a clear explanation about the softs and their optimisations when they reviewed the Haswell E plateform :

The protocol :

http://www.hardware.fr/articles/924-7/protocole-test.html

The X264/265 tests with explanations about the softs and optimisations :

http://www.hardware.fr/articles/924-12/encodage-x264-x265.html

 

[erunion]

Skybridges for ARM and X86 are the small cores, why would they design two other small cores with K12 and Zen..??.

...

Why? To replace the aging puma core, of course.
It sounds like you expect AMD to continue its big core+small core product stack. Post 2016 theres just one x86 core.

K12 will be larger than a57, but still targeted at dense servers. Not a "big core" replacement.

 

[itsmydamnation]

Why? To replace the aging puma core, of course.
It sounds like you expect AMD to continue its big core+small core product stack. Post 2016 theres just one x86 core.

K12 will be larger than a57, but still targeted at dense servers. Not a "big core" replacement.

you would assume that the cores have different target different perf/clock ranges but at this point it is an assumption and we will just have to wait and see.

dense servers can still have strong single threaded cores , see intels latest server chip. What i think will be more interesting is to see things like how wide are the cores in terms of int and SIMD. is the SIMD width the same for both cores? I think these are the kind of things where we will see differences thax to the existing AVX instruction sets.

 

[crashtech]

All I can say is things are REALLY slow on the CPU front when we're speculating about silicon that is over a year away. There is such a dearth of information that this thread is #7 on this month's Google results for "AMD Zen."

 

[Ramses]

All I can say is things are REALLY slow on the CPU front when we're speculating about silicon that is over a year away. There is such a dearth of information that this thread is #7 on this month's Google results for "AMD Zen."

Very true and very funny.

 

[Phynaz]

All I can say is things are REALLY slow on the desktopCPU front when we're speculating about silicon that is over a year away. There is such a dearth of information that this thread is #7 on this month's Google results for "AMD Zen."

Ftfy

 

[Abwx]

Why? To replace the aging puma core, of course.
It sounds like you expect AMD to continue its big core+small core product stack. Post 2016 theres just one x86 core.

K12 will be larger than a57, but still targeted at dense servers. Not a "big core" replacement.

The japanese article state that they are talking of several times the perfs of an A57 for K12, assuming a 2GHz A57 as basis and a 3GHz target for K12 this still require something like twice the perf/clock to accomodate the term "several" in a minimalist fashion.

Such a perf level is hardly compatible with a small core, rather with something at least 4 times the size of an A57.

http://news.mynavi.jp/articles/2015/03/04/amd_pccluster/

 

[Arachnotronic]

FWIW, I think AMD is trying to do a "big core" in the vein of Haswell/Broadwell.

K12 is supposed to be a much higher performance core than A57/A72 class, and if Zen is a "sister core" to that, then it should be more Core-class than Atom-class.

Whether AMD succeeds in building a competitor to what will either be Skylake/Cannonlake remains to be seen, but I think they're targeting a "big" core.

 

[ShintaiDK]

The japanese article state that they are talking of several times the perfs of an A57 for K12, assuming a 2GHz A57 as basis and a 3GHz target for K12 this still require something like twice the perf/clock to accomodate the term "several" in a minimalist fashion.

Such a perf level is hardly compatible with a small core, rather with something at least 4 times the size of an A57.

http://news.mynavi.jp/articles/2015/03/04/amd_pccluster/

Pascal is also 10x faster than Maxwell...until you remove the marketing.

Most of the performance may simply end up being more cores, better interconnects and other parts. Rather than per core direct performance. Or selected measurements using new instructions. My Haswell is also 80% faster than my Ivy Bridge. True story, if we exclude broad general computing.

Funny enough the history is filled with such claims. And none of them ever delivered.

 

[Abwx]

Most of the performance may simply end up being more cores, better interconnects and other parts. Rather than per core direct performance. Or selected measurements using new instructions. My Haswell is also 80% faster than my Ivy Bridge. True story, if we exclude broad general computing.

.

There s no new instructions to rely on with ARM64 ISA since the ISA is detained by ARM and AMD has to do with the existing instructions..

FWIW, I think AMD is trying to do a "big core" in the vein of Haswell/Broadwell.

K12 is supposed to be a much higher performance core than A57/A72 class, and if Zen is a "sister core" to that, then it should be more Core-class than Atom-class.

Whether AMD succeeds in building a competitor to what will either be Skylake/Cannonlake remains to be seen, but I think they're targeting a "big" core.

From the few we know from Jim Keller and Mark Papermaster interview as well as the japanese article it s quite possible that they even use the existing Excavator design for most of the blocks.

The front end is already 4 issues wide since Zambezi, what is necessary to increase IPC is a third ALU + AGLU as this would increase the single core theorical throughput by 50% from wich they could extract 20-30% better IPC after a few iterations.

I d point also, for the 100th time, that there is no such thing as an integer core within a Bulldozer module, theses are cores, period.

The FP threads are managed by the core s two ALUs, it s just that the mathematical execution is deported to an external execution unit shared with the other core, the FPU, since the ALU execute internaly only integer and logical operations, FP operations are "executed" by the ALUs for the management (instructions) and by the FPU when it comes to operational execution between operands.

 

[jpiniero]

K12 is supposed to be a much higher performance core than A57/A72 class, and if Zen is a "sister core" to that, then it should be more Core-class than Atom-class.

All indications are that K12 is solely going for MT perf/W and density above all else. So big core or high clock speeds would hurt their goal. I'm almost wondering if it will be in-order, or if you are lucky a MorphCore like scheme. They may do a high TDP chip, but it would be something like 32 cores @ 2 Ghz.

Zen is giving up the density and perf/W in exchange for somewhat higher clock speeds and the x86 tax.

 

[DrMrLordX]

As repeated ad nauseam the small core is Skybridge and is a successor to Puma, there s no point developping a new small core when the current Beema and Mullins have the best efficency in the sub 15W segment, and Carrizo will extend this lead up to 25-30W, so where is the need of yet another small core..?..

I thought Skybridge was the platform for a common socket for ARM and x86 CPUs. AMD has been promising us new cat cores in the form of Puma+ for over a year now, and now that Carrizo-L is showing up with Puma cores, the earliest they will deliver it is when Nolan finally launches.

That being said, I see no indicator of future cat cores past Puma+, and Excavator HDL + AVFS seems to be eating into cat territory already, no idea what Zen will do to that space either.

http://semiaccurate.com/forums/showpost.php?p=231022&postcount=987

Hey, I linked that in this thread already.

 

[Abwx]

I thought Skybridge was the platform for a common socket for ARM and x86 CPUs. AMD has been promising us new cat cores in the form of Puma+ for over a year now, and now that Carrizo-L is showing up with Puma cores, the earliest they will deliver it is when Nolan finally launches.

That being said, I see no indicator of future cat cores past Puma+, and Excavator HDL + AVFS seems to be eating into cat territory already, no idea what Zen will do to that space either.

Puma+ and A57 besed Skybridges will be released in 2015 since they displayed the slide with this year at the japanese conference, a SA member who has some knowledge of the thing said that they have functional silicon for quite some time.

As for Carrizo it has likely better efficency than Beema starting around 10W and will cover the 15-35W segment, it s important for AMD to have a competitive offering up to i7 level of profitability...

Below 10W Beema/Mullins has progressively better efficency by the virtue of its smallness, and it has overall the best perf/Watt ratio in its segment.

Hey, I linked that in this thread already.

Ok, sorry, didnt notice...

 

[itsmydamnation]

Most of the performance may simply end up being more cores, better interconnects and other parts. Rather than per core direct performance. Or selected measurements using new instructions. My Haswell is also 80% faster than my Ivy Bridge. True story, if we exclude broad general computing.

Except for when the lead of both cores tells the public otherwise. Or is the chief architect for cores in marketing . The questions are around at what points on the different curves they aim for and how well they execute.

 

[ShintaiDK]

Except for when the lead of both cores tells the public otherwise. Or is the chief architect for cores in marketing . The questions are around at what points on the different curves they aim for and how well they execute.

Such people never mislead us before, right?

When you look on the R&D, its getting quite obvious what AMDs ability to target is.

 

[Abwx]

Except for when the lead of both cores tells the public otherwise. Or is the chief architect for cores in marketing . The questions are around at what points on the different curves they aim for and how well they execute.

This RM date from late 2013, so far it has been accurate and it is mentioned that the X86 circa 2016 new core is high performance, so it was a target from the start, indeed Jim Keller confirmed it.

I guess that most people that do not agree with this fact are actualy much more fearfull than really doubtfull of such a scenario, the only question that would remain undecided in a safe discussion is the absolute perf level they are targeting, my own guess is the throughput of an Excavator module as basis.

 

[itsmydamnation]

Such people never mislead us before, right?

Keep moving those goal posts because you were wrong.

When you look on the R&D, its getting quite obvious what AMDs ability to target is.

You have no ability to look on AMD R&D, what's the break down better different teams, different chips. how much was spent on piledriver/steamroller/excavator vs Zen/K12? Yes AMD is loosing R&D funding, but you have no way to know what's been targeted and how.

So keep presenting speculation as fact :thumbsup:

 

[Enigmoid]

... only question that would remain undecided in a safe discussion is the absolute perf level they are targeting, my own guess is the throughput of an Excavator module as basis.

They can target whatever on Earth they want...that has no bearing on what they will actually achieve.

Throughput of an Excavator module would be around that of Broadwell IPC (+SMT). Personally, I think they have absolutely no chance in hell of reaching that.

 

[mrmt]

FWIW, I think AMD is trying to do a "big core" in the vein of Haswell/Broadwell.

If they take that route they are toast.