[Digitimes] AMD updates product roadmap for 2014 and 2015

[AtenRa]

Fudzilla also said Richland was GCN....they don't have a clue. Plus, there is no radeon 8000 core. Radeon 8000 is an OEM only rebadge of GCN 7000 series. GCN 2.0 is not going to be called 8000.

Steppe Eagle may turn out to be GCN 2.0, but fudzilla is just making stuff up at this point.

edit: now I've done the fact checking. Fudzillas report contradicts AMDs own statements.


http://www.marketwire.com/press-release/amd-details-embedded-product-roadmap-nyse-amd-1828672.htm

Jaguar products Kabini/Temash have HD8000 series Graphics.

 

[erunion]

..then so are Richland! Even though Kabini is GCN and Richland is VLIW5.

For all we know, AMD will call GCN in Kabini 2.0 9000 series. But it doesn't matter, because like I said originally: Fudzilla just makes stuff up.

Good slide though. I thought 2nd half of 2014 was far enough away that hierofalcon could be 20nm. I guess not. GF 28nm then?

 

[AtenRa]

..then so are Richland! Even though Kabini is GCN and Richland is VLIW5.

For all we know, AMD will call GCN in Kabini 2.0 9000 series. But it doesn't matter, because like I said originally: Fudzilla just makes stuff up.

The roadmap says HD8000 for the Stepee Eagle, thats what Fudzilla reports. And yes Ritchland has HD8000 series graphics. iGPU naming doesnt following discrete Graphics.

edit: 22/20nm will be after 2014

 

[Exophase]

..then so are Richland! Even though Kabini is GCN and Richland is VLIW5.

That may have just been a typo, but Trinity and Richland are VLIW4.

Your point still stands though, for years the numbering has given little insight into the actual hardware generation..

 

[erunion]

That may have just been a typo, but Trinity and Richland are VLIW4.

Your point still stands though, for years the numbering has given little insight into the actual hardware generation..

Thanks. Brain fart.

edit: 22/20nm will be after 2014

I thought end of 2014 was the timetable for 20nm TSMC, no?

 

[AtenRa]

Thanks. Brain fart.



I thought end of 2014 was the timetable for 20nm TSMC, no?

Im talking about products, when 22/20nm products will be released. The process may be ready earlier.

 

[ShintaiDK]

15-30W ARM chips. That was an easy win for Intel. And there went all the rubbish about ARMs power/perf advantage,

 

[AtenRa]

15-30W ARM chips. That was an easy win for Intel. And there went all the rubbish about ARMs power/perf advantage,

And you know the power/performance by looking at the TDP numbers?? you must be the only one in the world who can do that. But as always, you have to find something bad to say about every AMD product.

 

[ShintaiDK]

And you know the power/performance by looking at the TDP numbers?? you must be the only one in the world who can do that. But as always, you have to find something bad to say about every AMD product.

Yes, only AMD makes ARM products. So it must be against AMD for sure

 

[Dresdenboy]

15-30W ARM chips. That was an easy win for Intel. And there went all the rubbish about ARMs power/perf advantage,

They might just have a 2W SDP for web browsing.

 

[AtenRa]

Yes, only AMD makes ARM products. So it must be against AMD for sure

Have you seen a Cortex-A57 64-bit ARM server SoC before to know the power/perf by looking at the TDP alone ?? wtf man, not even Nostradamus can do that

 

[ShintaiDK]

Have you seen a Cortex-A57 64-bit ARM server APU before to know the power/perf by looking at the TDP alone ?? wtf man, not even Nostradamus can do that

The slide says CPU, not APU.

 

[AtenRa]

The slide says CPU, not APU.

Yes my bad, i meant SoC ill fix it

 

[SiliconWars]

15-30W ARM chips. That was an easy win for Intel. And there went all the rubbish about ARMs power/perf advantage,

You realise the A57 has well over 50% more performance than the A15?

 

[USER8000]

Kaveri seems to be Q4 2013 for desktop models:

http://wccftech.com/amd-kaveri-apu-...i-graphics-demonstrated-virtual-reality-tech/

 

[Dresdenboy]

You realise the A57 has well over 50% more performance than the A15?

Oh, that's not good. Now there might come a bunch of replies, that these numbers are made up, DMIPS is old and doesn't reflect the improved NEON, that it's actually just 30% and 90% of it are the result of the new process, etc.

But actually in that chip with a decent RAM interface (even supporting DDR4, IIRC) and L2 cache those ARM cores might actually get something to do. How many ARM SoCs have RAM buses wider than 64 bit?

 

[jones377]

This is straight from AMD's mouth.

http://www.amd.com/us/press-releases/Pages/amd-details-embedded-2013sept9.aspx

"Hierofalcon" is the most interesting product by far announced by AMD. It doesn't mention any TDP, but it does include 8 A57 ARM-cores, 2 64bit DDR3/4 channels with ECC, 10Gb Ethernet and PCIe Gen3, but no mention of Seamicro IP. This is similar or better than Intel's Avoton, however Intel will be first to market by about 9+ months or so. So really Hierofalcon will be up against the Avoton successor.

AMD will also compete head on with a bunch of companies building ARM server SoCs, including Calxeda, but with Intel beating all of them to market with a 64-bit server SoC the ARM server market might end up stillborn.

Another thing is that while AMD is pushing and talking about HSA/GPGPU everywhere, when they actually design a dedicated server SoC, it doesn't have a GPU. To me at least this suggests that the server division is still grounded in reality. HSA in servers is just a dream. It's one thing to port server software to ARM, it's another thing entirely to rewrite it to HSA/GPGPU.

Steppe Eagle, Bald Eagle etc are just rebadged x86 laptop APUs. They don't include ECC and so I doubt they will see serious use.

 

[USER8000]

Jaguar products Kabini/Temash have HD8000 series Graphics.

It seems Kaveri is using an HD9000 series IGP. So it probably is GCN2.0, as opposed to the first generation GCN based HD8000 IGPs found in Jaguar based chips.

 

[NTMBK]

It seems Kaveri is using an HD9000 series IGP. So it probably is GCN2.0, as opposed to the first generation GCN based HD8000 IGPs found in Jaguar based chips.

The AMD numbering scheme in no way relates to the silicon actually in the chips. For instance, "HD7000" can refer to GCN, VLIW4 or VLIW5 depending on which product you look at. Heck, Bobcat got its GPU promoted from HD6000 to HD7000, despite it being the EXACT SAME CHIP. The only thing you can say is that it roughly indicates what year the part came out in.

 

[USER8000]

The AMD numbering scheme in no way relates to the silicon actually in the chips. For instance, "HD7000" can refer to GCN, VLIW4 or VLIW5 depending on which product you look at. Heck, Bobcat got its GPU promoted from HD6000 to HD7000, despite it being the EXACT SAME CHIP. The only thing you can say is that it roughly indicates what year the part came out in.

It is also likely the parts will be the current GCN parts anyway. Jaguar used current gen GCN and is named HD8000,so there is no grounds to think it will be anything else with Kaveri. The HD8000 series is almost entirely GCN based,with a number of rebrands and some brand new products like Oland,and even then every single leak indicates Kaveri will be GCN based.

I think it will be most likely,the next iteration of GCN with Kaveri, TBH at least looking at the timeframe,and the talk about HSA improvements,ie,compute improvements which are most likely to where GCN2.0 is improved in(plus you can see some of the changes with the PS4 SOC in one of the TR articles).

For instance the PS4 GPU has some interesting changes(from TR):

• An additional bus has been grafted to the GPU, providing a direct link to system memory that bypasses the GPU's caches. This dedicated bus offers "almost 20GB/s" of bandwidth, according to Cerny.
• The GPU's L2 cache has been enhanced to better support simultaneous use by graphics and compute workloads. Compute-related cache lines are marked as "volatile" and can be written or invalidated selectively.
• The number of "sources" for GPU compute commands has been increased dramatically. The GCN architecture supports one graphics source and two compute sources, according to Cerny, but the PS4 boosts the number of compute command sources to 64.

I expect the HD9000 series cards which are being launched soon to have some of those features,and the Kaveri IGP to support a number of them. It would make a lot of sense according to all the PR AMD has released about Kaveri about it being the first proper "HSA enabled" step they are doing.

 

[Third_Eye]

This is straight from AMD's mouth.

http://www.amd.com/us/press-releases/Pages/amd-details-embedded-2013sept9.aspx

"Hierofalcon" is the most interesting product by far announced by AMD. It doesn't mention any TDP, but it does include 8 A57 ARM-cores, 2 64bit DDR3/4 channels with ECC, 10Gb Ethernet and PCIe Gen3, but no mention of Seamicro IP. This is similar or better than Intel's Avoton, however Intel will be first to market by about 9+ months or so. So really Hierofalcon will be up against the Avoton successor.

AMD will also compete head on with a bunch of companies building ARM server SoCs, including Calxeda, but with Intel beating all of them to market with a 64-bit server SoC the ARM server market might end up stillborn.

Another thing is that while AMD is pushing and talking about HSA/GPGPU everywhere, when they actually design a dedicated server SoC, it doesn't have a GPU. To me at least this suggests that the server division is still grounded in reality. HSA in servers is just a dream. It's one thing to port server software to ARM, it's another thing entirely to rewrite it to HSA/GPGPU.

Steppe Eagle, Bald Eagle etc are just rebadged x86 laptop APUs. They don't include ECC and so I doubt they will see serious use.

Keep in mind that this presentation is from the Embedded Products Group. Not their traditional PC/server group that we are used to. So perhaps that is the reason that ECC is not explicit.

This roadmap is a little better than the previous one with respect to specifics.
Atleast with embedded group we are finding two things that I thought were written off in the PC/Server roadmap.

a) Jaguar cores in the are getting an upgrade in the G series of products. It is called "Enhanced Jaguar".
Might mean that Kyoto series of Opteron X could also in theory utilize this improvement thus not "Elop" ing the Kyoto family.
b) We also know that we would have a pure Steamroller CPU "Bald Eagle" successor to the Piledriver CPU based R-Series. So SR will exist in atleast 1 set of products sans APU. So hopefully then somelight at the end of the tunnel for Warsaw too to have SR core perhaps....

 

[jones377]

Keep in mind that this presentation is from the Embedded Products Group. Not their traditional PC/server group that we are used to. So perhaps that is the reason that ECC is not explicit.

AMD mentions ECC for Hierofalcon but not for Bald Eagle in the same press release. Bald Eagle is likely the same die as Kaveri, which does not have ECC since it is targeted for desktop/laptop.

 

[youshotwhointhe]

I am surprised no one mentioned "Adelaar". It is described as a "discrete" GPU, but it can embed 2GB of memory with MCM packaging. This must be the solution AMD is aiming for to overcome the memory bottleneck on their APU designs.

 

[monstercameron]

I am surprised no one mentioned "Adelaar". It is described as a "discrete" GPU, but it can embed 2GB of memory with MCM packaging. This must be the solution AMD is aiming for to overcome the memory bottleneck on their APU designs.

high bus width memory in mcm format for apus?

 

[Enigmoid]

I am surprised no one mentioned "Adelaar". It is described as a "discrete" GPU, but it can embed 2GB of memory with MCM packaging. This must be the solution AMD is aiming for to overcome the memory bottleneck on their APU designs.

high bus width memory in mcm format for apus?

If that's the case then I'm going to be extremely leery of AMD's APUs.

Makes absolutely no sense in my opinion. Why not just add a low power DGPU. With GDDR5 you are not saving much power (bus, traces, Vram) consume power. A separate MCM module takes up a lot more space and costs more than soldering a low-mid end gpu on the mobo. If its vram for the APU, why not just solder in onto the mobo near the APU? If AMD is going to do some sort of hybrid crossfire where the APU has a direct path to the Vram then their drivers are going to need a LOT of work.

Adelaar is replacing http://www.amd.com/us/products/embedded/graphics-processors/Pages/radeon-e6760-discrete-gpu.aspx I'm assuming its for embedded systems.