Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[DrMrLordX]

Here is a slightly better SFR score but GB (especially v6) is not a good benchmark for these types of systems and early, pre production results could be worse than the final product. I still think SFR will lag way behind, but we need confirmed good results with quality benchmarks to say for sure.

Intel Corporation BeechnutCity vs ASUSTeK COMPUTER INC. RS700A-E12-RS12U - Geekbench

Depending on whom you believe, the Sierra Forest product line has been cut back significantly. The largest single socket CPU from that line is now only 144c, and Intel is on the hook to deliver to specific customers "or else". Kinda hard to confirm that last point, but the subtext here is that Sierra Forest isn't necessarily going to be a high volume product that all the cloud guys are gonna want (nor will general datacentre want it either). We may never see comprehensive third-party benchmarks of Sierra Forest unless someone like Michael Larabel gets his hands on it.

 

[Tigerick]

This would support the notion that whatever messups the process development team had, the design team is just as bad if not worse. The running joke was design team deficits were made up by the process team.

Also @Exist50 said server division is mostly ok now, while he didn't seem to be sure about client.

Sierra Forest and Granite Rapids 6 months earlier is proof?

I am afraid SRF and GNR won't perform as good as competitor, they are most likely dragged down by IFS. You should check out the thread above to see performance comparison between SRF and Bergamo. As old saying you have to watch what Intel deliver not what Intel's claim, below is my assessment of IFS's 5 nodes in 4 years:-

• Meteor Lake @ Intel 4: I have listed the numbers in the table here. He bought all the retail units in China and benchmark them. You should check out 3DMark Timespy's numbers and compare the gaming performance, then you should know tCPU is dragging down overall FPS of the games. Remember Intel 4 is original Intel's 7nm process which Intel has been struggling for years and end up splitting the design into 4 tiles and yet....And Intel's MTL U-series has been severely cut down version of H series.
• 
  
• Sierra Forest @ Intel 3: As shown here, without HT, SRF's performance with 144 cores of CPU has been pretty poor....
• 
  
• Granite Rapids @ Intel 3: At this stage I suspect GNR might remove HT as well, ie. GNR might get regression from Emerald Rapid's 64c/128t to GNR's 72c/72t (72 cores are the rumored figures, if you have different numbers, let me know).
• 
  
• Arrow Lake @ Intel 20A: ARL should be used on non-K desktop version and if Intel removes HT from ARL, then we should be expecting another regression from 20t to 14t....not looking good
• 
  
• Arrow Lake @ TSMC's N3B: There are 2 versions planned: 8P+16E (24T) and 8P+32E (40T). TSMC's version with 40T looks better but Intel most likely remove HT as well to make features parity with 20A version
• 
  
• Lunar Lake @ TSMC's N3B: LNL is most promising APU from TSMC cause they are the only CPU with integrated GPU and memory controllers, which Intel has been trying to offload to TSMC since beginning and you probably won't see such integration from IFS for long time...
• 
  
• Clearwater Forest @ Intel 18A: The leaks mentioned that CWF-AP is having 288 cores with much bigger IPC improvements. No words on HT/RU though and judging by the low performance of SRF, I don't think CWF will touch performance of Bergamo.
• 
  
• Diamond Rapids @ Intel 18A: MLID leaked about DMR might get RU support. By that time, AMD has EYPC with 256 p-cores (8 x 32c), I really wonder how many cores Intel could put in...
• 
  
• Panther Lake @ Intel 18A: This mobile version is leaked to have 4P+8E without HT/RU but with integrated IOD. Yes, Intel has finally reduced the numbers of tile from 4 to 2 and this design could be used for a long time in client CPU. Based on timings, tGPU with IMC should be made by TSMC's N3P process. As for whatever Intel's claim about 18A's PPW, well that part is used by integrated IOD....In fact, the specs of Panther Lake is similar to AMD's Strix Point (4P+8E by N4P monolithic design), except Intel has to rely on TSMC's N3P to complete the APU....such a advanced process.

Well, I think Intel will deliver 5 nodes in 4 years but as you can see above, too many corners have been cut. The removal of HT, offloading graphics IP and MC to TSMC, asking TSMC to make whole CPU and so on, yeah IFS is definitely not up to TSMC's standard. They are even worse than Samsung Foundry on PPA, that's why Qualcomm has baited out of it...

 

[SiliconFly]

I.m sure intel is using n3b for i7 and i9 because it clocks higher than the brand new node 20a.. mild said 6.5ghz can be reached on 8+16 not 8+32 yet.. he said his seen arrow lake cibebench results vs raptor lake

Are you sure mlid said 6.5GHz for 8+16 on TSMC N3B? Like 20A, even N3B is brand new! May not clock that high.

And I think we should take mlid's 30% ST perf gain for ARL with a pinch of salt. Sounds too good to be true.

Something doesn't add up!

 

[coercitiv]

Sierra Forest @ Intel 3: As shown here, the removal of HT of SRF has crippled the performance of CPU even though they are having 144 cores. I think the reasons behind is because Intel chooses to prioritize core counts than HT to make SRF looks good.

Maybe I'm tired and missing something, but what HT removal are you talking about? Sierra Forest is an E core design, why would it have SMT in the first place?

 

[Tigerick]

Maybe I'm tired and missing something, but what HT removal are you talking about? Sierra Forest is an E core design, why would it have SMT in the first place?

Yep, Intel's e cores don't have HT to start with but AMD's Bergamo has it. And you should check out other lineup with P-cores, seems like Intel has removed HT from it as well..

PS: I have changed the wordings to refect that...

 

[SiliconFly]

I am afraid SRF and GNR won't perform as good as competitor, they are most likely dragged down by IFS. You should check out the thread above to see performance comparison between SRF and Bergamo. As old saying you have to watch what Intel deliver not what Intel's claim, below is my assessment of IFS's 5 nodes in 4 years:-

• Meteor Lake @ Intel 4: I have listed the numbers in the table here. He bought all the retail units in China and benchmark them. You should check out 3DMark Timespy's numbers and compare the gaming performance, then you should know tCPU is dragging down overall FPS of the games. Remember Intel 4 is original Intel's 7nm process which Intel has been struggling for years and end up splitting the design into 4 tiles and yet....And Intel's MTL U-series has been severely cut down version of H series.
• 
  
• Sierra Forest @ Intel 3: As shown here, without HT, SRF's performance with 144 cores of CPU has been pretty poor....
• 
  
• Granite Rapids @ Intel 3: At this stage I suspect GNR might remove HT as well, ie. GNR might get regression from Emerald Rapid's 64c/128t to GNR's 72c/72t (72 cores are the rumored figures, if you have different numbers, let me know).
• 
  
• Arrow Lake @ Intel 20A: ARL should be used on non-K desktop version and if Intel removes HT from ARL, then we should be expecting another regression from 20t to 14t....not looking look
• 
  
• Arrow Lake @ TSMC's N3B: There are 2 versions planned: 8P+16E (24T) and 8P+32E (40T). TSMC's version with 40T looks better but Intel most likely remove HT as well to make features parity with 20A version
• 
  
• Lunar Lake @ TSMC's N3B: LNL is most promising APU from TSMC cause they are the only CPU with integrated GPU and memory controllers, which Intel has been trying to offload to TSMC since beginning and you probably won't see such integration from IFS for long time...
• 
  
• Clearwater Forest @ Intel 18A: The leaks mentioned that CWF-AP is having 288 cores with much bigger IPC improvements. No words on HT/RU though and judging by the low performance of SRF, I don't think CWF will touch performance of Bergamo.
• 
  
• Diamond Rapids @ Intel 18A: MLID leaked about DMR might get RU support. By that time, AMD has EYPC with 256 p-cores (8 x 32c), I really wonder how many cores Intel could put in...
• 
  
• Panther Lake @ Intel 18A: This mobile version is leaked to have 4P+8E without HT/RU but with integrated IOD. Yes, Intel has finally reduced the numbers of tile from 4 to 2 and this design could be used for a long time in client CPU. Based on timings, tGPU with IMC should be made by TSMC's N3P process. As for whatever Intel's claim about 18A's PPW, well that part is used by integrated IOD....In fact, the specs of Panther Lake is similar to AMD's Strix Point (4P+8E by N4P monolithic design), except Intel has to rely on TSMC's N3P to complete the APU....such a advanced process.

Well, I think Intel will deliver 5 nodes in 4 years but as you can see above, too many corners have been cut. The removal of HT, offloading graphics IP and MC to TSMC, asking TSMC to make whole CPU and so on, yeah IFS is definitely not up to TSMC's standard. They are even worse than Samsung Foundry on PPA, that's why Qualcomm has baited out of it...

Nice write up. But the conclusion isn't right. The above listed problems are not related to their nodes per se but the respective design teams. The issues you yourself have mentioned are MTL -> RWC performance & SRF -> E core performance.

And, ARL on N3B is due to 20A limited capacity. 20A is a purpose built stopgap node. 18A is their high volume full node with the full suite of cell libraries for all products/clients like CWF, Diamond Rapids, PNL, etc, and even more like third parties. 5NI4Y culminates in 18A which is well ahead of TSMC N2 by almost two years!!! That is a remarkable achievement by any means.

 

[DavidC1]

The test system consists of DP server solution. Each CPU is having 144 E-core without HT and running at 2.2GHz. That's mean the end results of performance comparison is between Intel's 288c/288T against AMD's 256c/512T. And AMD has performed more than double than SRF....

Please. And you expect that to be the final result, when that result was released back in November or so of last year? Potentially 6 months before launch?

Also, Bergamo and SRF are primarily aimed at cloud. Integer results are far closer.

Geekbench 5 Int vs FP
N100: 991 vs 1071
9754: 1060 vs 1358

So just 17% per clock gap separates them, while in FP it's 40%, which is ballpark similar to SpecCPU tests. Spec tests show 25% advantage for Golden Cove in Integer over Grace, while in FP it was 40-50%. Zen 4 was about 3% slower than Golden Cove.

How was Meteorlake as an example doing back in May? I vaguely remember the iGPU barely outperforming Iris Xe. I remember the same about Tigerlake's Xe barely outperforming HD 620.

At similar 3.4GHz to N100 it'll be very competitive.

 

[Goop_reformed]

Yes.

So in summary:

New core: check
New node: check
New graphics tile: check
New and expensive packaging tech: check

The thing barely competes with Phoenix which was release 3 quarters before. Next please.

 

[SiliconFly]

So in summary:

New core: check
New node: check
New graphics tile: check
New and expensive packaging tech: check

The thing barely competes with Phoenix which was release 3 quarters before. Next please.

Nope. Corrections...

New core: check uncheck
New node: check
New graphics tile: check
New and expensive packaging tech: check uncheck

RWC is not new. It's just a rehash of last gen with the added latencies of tiles. A core design thats not supposed to exist in this day and age. Thankfully, Intel is getting rid of this aging core for good & replacing it with LNC in ARL, LNL, ARL+, PNL, Diamond Rapids, etc. And if LNC performs like rumors suggest (i.e, >30% ST gains like MLID says), then it's gonna be a game changer.

As far as packaging is concerned, Foveros & NOC interconnect fabric are light years ahead of AMD's outdated infinity fabric.

 

[SiliconFly]

Asked and you get preliminary result of upcoming Sierra Forest against Bergamo:-

ASUSTeK COMPUTER INC. RS700A-E12-RS12U vs Intel Corporation BeechnutCity - Geekbench

The test system consists of DP server solution. Each CPU is having 144 E-core without HT and running at 2.2GHz. That's mean the end results of performance comparison is between Intel's 288c/288T against AMD's 256c/512T. And AMD has performed more than double than SRF....

We don't know what TDP of Sierra Forest, some said much lower than AMD EPYC 9754's 360W, but the results are really bad against Bergamo not to mention upcoming Turin Dense.

Nope. Wrong comparison. Intel's equivalent of top-end Bergamo 128C is top-end Sierra forest 288C. So, the comparison should be between 2x Bergamo 128C (total 256C/512T) vs 2x SF 288 (total 576C/576T).

Whereas, the link compares top-end Bergamo with mid-range SF 144.

 

[DrMrLordX]

RWC is not new. It's just a rehash of last gen with the added latencies of tiles. A core design thats not supposed to exist in this day and age.

Making it worse than he thought.

 

[SiliconFly]

Making it worse than he thought.

Yep. But in theory, the LPE cores were supposed to offset that disadvantage with a proportional increase in power efficiency in average use cases. Whether it happens or not only time can tell. So far, the results are unclear and all over the place.

 

[Tigerick]

Nope. Wrong comparison. Intel's equivalent of top-end Bergamo 128C is top-end Sierra forest 288C. So, the comparison should be between 2x Bergamo 128C (total 256C/512T) vs 2x SF 288 (total 576C/576T).

Whereas, the link compares top-end Bergamo with mid-range SF 144.

Haha, the max core for single CPU is 144 e-core. Guess you didn't get the memo from Intel...

 

[ashFTW]

Haha, the max core for single CPU is 144 e-core. Guess you didn't get the memo from Intel...

There is a 288 core version, with two compute chiplets and 12 memory channels, that was announced recently; the 144 core version has one compute chiplet and 8 channels.

Intel Xeon Roadmap On Track, 288 Core “Sierra Forest” Coming Soon

Sometimes, especially with Intel in the past several years, the fact that the CPU roadmap doesn’t change is the news. And in this case, during Intel’s

www.nextplatform.com

Intel Announces 288-Core Sierra Forest CPU, 5th-Gen Xeon Arrives December 14

Intel’s new behemoth packs a threaded punch.

www.tomshardware.com

 

[Tigerick]

There is a 288 core version, with two compute chiplets and 12 memory channels, that was announced recently; the 144 core version has one compute chiplet and 8 channels.

View attachment 92118

Intel Xeon Roadmap On Track, 288 Core “Sierra Forest” Coming Soon

Sometimes, especially with Intel in the past several years, the fact that the CPU roadmap doesn’t change is the news. And in this case, during Intel’s

www.nextplatform.com

Intel Announces 288-Core Sierra Forest CPU, 5th-Gen Xeon Arrives December 14

Intel’s new behemoth packs a threaded punch.

www.tomshardware.com

Interesting, no words on when Intel about shipping date. And don't forget AMD has Turin Dense with 192/384 coming in Q3 this year..

 

[Tigerick]

Depending on whom you believe, the Sierra Forest product line has been cut back significantly. The largest single socket CPU from that line is now only 144c, and Intel is on the hook to deliver to specific customers "or else". Kinda hard to confirm that last point, but the subtext here is that Sierra Forest isn't necessarily going to be a high volume product that all the cloud guys are gonna want (nor will general datacentre want it either). We may never see comprehensive third-party benchmarks of Sierra Forest unless someone like Michael Larabel gets his hands on it.

Source?
Cause someone just mentioned Intel has 288cores planned...

 

[Abwx]

There is a 288 core version, with two compute chiplets and 12 memory channels, that was announced recently; the 144 core version has one compute chiplet and 8 channels.

View attachment 92118

Intel Xeon Roadmap On Track, 288 Core “Sierra Forest” Coming Soon

Sometimes, especially with Intel in the past several years, the fact that the CPU roadmap doesn’t change is the news. And in this case, during Intel’s

www.nextplatform.com

Intel Announces 288-Core Sierra Forest CPU, 5th-Gen Xeon Arrives December 14

Intel’s new behemoth packs a threaded punch.

www.tomshardware.com

That could be a mock CPU just to show how a 288C looks, with tiles glued with some cyanolyt, if there was anything functional we would know about it...

 

[Dayman1225]

That could be a mock CPU just to show how a 288C looks, with tiles glued with some cyanolyt, if there was anything functional we would know about it...

They showed it running when announced

 

[QuickyDuck]

There is a 288 core version, with two compute chiplets and 12 memory channels, that was announced recently; the 144 core version has one compute chiplet and 8 channels.

View attachment 92118

Intel Xeon Roadmap On Track, 288 Core “Sierra Forest” Coming Soon

Sometimes, especially with Intel in the past several years, the fact that the CPU roadmap doesn’t change is the news. And in this case, during Intel’s

www.nextplatform.com

Intel Announces 288-Core Sierra Forest CPU, 5th-Gen Xeon Arrives December 14

Intel’s new behemoth packs a threaded punch.

www.tomshardware.com

It's gonna be a low volume product like Cascade Lake-AP.
Nothing new but put two standard CPU in one package just to match AMD on paper.

Engineering team was going to mothball it but the CEO thought it's a good idea.

 

[Abwx]

They showed it running when announced

IIRC they showed a 2S system with 2 x 144C, but well, we should have some news sooner or later.

 

[SiliconFly]

Haha, the max core for single CPU is 144 e-core. Guess you didn't get the memo from Intel...

Looks like you didn't!

 

[yuri69]

It's gonna be a low volume product like Cascade Lake-AP.
Nothing new but put two standard CPU in one package just to match AMD on paper.

Usually, the hyperscalers are behind those odd products. IIRC a Facebook/Meta project was the reason for Cascade Lake's existence.

 

[Henry swagger]

Looks like you didn't!

https://wccftech.com/intel-arrow-la...-out-24-cpu-cores-ddr5-6400-800-motherboards/ .. arrow lake will have a higher base clocks than raptor lake

 

[Thunder 57]

https://wccftech.com/intel-arrow-la...-out-24-cpu-cores-ddr5-6400-800-motherboards/ .. arrow lake will have a higher base clocks than raptor lake

That website is cancer. Remember when they said Zen would have 512MB of L3 cache? Years before 3D cache was a thing.

 

[mikk]

That website is cancer. Remember when they said Zen would have 512MB of L3 cache? Years before 3D cache was a thing.

It has nothing to do with this website, the leak comes from YuuKi_AnS.