Intel Skylake / Kaby Lake

[IndyColtsFan]

The good news is that HEDT CPU cores and the mainstream ones look set to converge. Kabylake will be in market in early 2017, around when Skylake-E will be

So I haven't kept up lately - KabyLake is now a 2017 product and not 2016?

 

[Arachnotronic]

So I haven't kept up lately - KabyLake is now a 2017 product and not 2016?

Kaby Lake will trickle out in late 2016 (U/Y and maybe DT), but it's so late in 2016 that a Q1 launch of Skylake-E would basically close the gap.

 

[JoeRambo]

So Skylake GT4e is coming to desktops after all.

Yup. But one that will require new mobo with Kabylake PCH. It is quite logical after all, since cache tags, logic is in northbridge, it is no longer usable with chipset that does not contain that.

 

[ShintaiDK]

Yup. But one that will require new mobo with Kabylake PCH. It is quite logical after all, since cache tags, logic is in northbridge, it is no longer usable with chipset that does not contain that.

Chipset got absolutely nothing to do with that.

There is no such thing as a northbridge either.

 

[dark zero]

OK, so Cannonlake is basically a 2018 product at this rate.

If something big happens, it might end to be a Q4 2018 or even a 2019 product

 

[NTMBK]

Yup. But one that will require new mobo with Kabylake PCH. It is quite logical after all, since cache tags, logic is in northbridge, it is no longer usable with chipset that does not contain that.

The northbridge has been integrated into the CPU for quite some time now The vestigial "chipset" is basically the old southbridge- it's just a bunch of connections for devices, hanging off a glorified PCIe link.

 

[witeken]

OK, so Cannonlake is basically a 2018 product at this rate.

But... but... go to the Q2 earnings call and CTRL+F "millions". There will be millions of 10nm in H2.

If not, then I'm really going to put some question marks at Intel's proficiency and lead, cause TSMC and SS have both done good jobs of equipping their 20nm node with FinFET, and TSMC is still saying (since H2'13!) that 10nm will be in risk production this quarter, so they don't seem to have problems, and neither does SS.

 

[mikk]

I don't think Cannonlake will come before H1 2018 given that the second revision of Kabylake is coming in H1 2017.

 

[vegitto4]

maybe there won't be any Cannonlake and there will be directly the new arch (Icelake?) at 10nm in 2018?

 

[witeken]

maybe there won't be any Cannonlake and there will be directly the new arch (Icelake?) at 10nm in 2018?

Let's stick to the announced facts.

Maybe the 14nm gives us a clue: yields are still not good enough. But does that impact 10nm? I dunno. They're working on it and learning from 14nm.

 

[frozentundra123456]

I thought it was already announced that Cannonlake was going to be mobile only like Broadwell. Or was that before Kaby Lake was announced?

 

[Sweepr]

OK, so Cannonlake is basically a 2018 product at this rate.

I don't think Cannonlake will come before H1 2018 given that the second revision of Kabylake is coming in H1 2017.

I hope you guys are wrong. I'd like to see Cannonlake in some form (at least mobile) in H2-2017. Here's hoping they pull out a Broadwell-Skylake style transition (closer launch).

I thought it was already announced that Cannonlake was going to be mobile only like Broadwell. Or was that before Kaby Lake was announced?

If I'm not mistaken Cannonlake will get the full desktop treatment. We already know it's coming to servers:

They better give us 6-8 core LGA115X SKUs by then (HEDT moving to 10-12 core).

More emphasis on the igp. I can hardly stand the excitement.

More exciting than desktop Kaby Lake IMHO. eDRAM could provide a bigger boost (in games) than slightly higher clocks.

 

[Arachnotronic]

I thought it was already announced that Cannonlake was going to be mobile only like Broadwell. Or was that before Kaby Lake was announced?

Actually no. Kirk Skaugen said in a recent investor conference that making Broadwell mobile-only hurt their desktop business in 2015, and it is a mistake that they don't plan to repeat again. Processors for this segment will be released at an annual clip.

 

[jpiniero]

Actually no. Kirk Skaugen said in a recent investor conference that making Broadwell mobile-only hurt their desktop business in 2015, and it is a mistake that they don't plan to repeat again. Processors for this segment will be released at an annual clip.

Given all of the yield problems I don't know if they could have supported a desktop launch in a reasonable timeframe unless it was the dual core models only.

The reasoning for Cannonlake being mobile only was presumably because it won't be socket compatible with LGA 1151, so the lifespan would have been way too short. But now there's Kabylake so that changes things.

 

[Arachnotronic]

Given all of the yield problems I don't know if they could have supported a desktop launch in a reasonable timeframe unless it was the dual core models only.

The reasoning for Cannonlake being mobile only was presumably because it won't be socket compatible with LGA 1151, so the lifespan would have been way too short. But now there's Kabylake so that changes things.

A 4+2 config would probably have had the same die size as the 2+3 config that debuted in the MacBook Air.

 

[jpiniero]

A 4+2 config would probably have had the same die size as the 2+3 config that debuted in the MacBook Air.

That's true.. but I believe the CPU cores are harder to get good yield on (esp when you talk about 4 ghz clocks) compared to the GPU cores. So it's not quite apples-to-apples.

 

[witeken]

I don't think I've seen slides from Intel like this for 14nm, sadly:

http://www.intel.com/content/dam/ww...ilicon-technology-leadership-presentation.pdf

Many interesting tibdits, like SoC vs. regular process, analog improved, subthreshold slope, interconnect menu, etc.

Oh, and I didn't really realize that 22nm doesn't use multiple patterning, at least not for interconnct, there is't all single patterning. No wonder 22nm has such good yields.

 

[Arachnotronic]

I don't think I've seen slides from Intel like this for 14nm, sadly:

http://www.intel.com/content/dam/ww...ilicon-technology-leadership-presentation.pdf

Many interesting tibdits, like SoC vs. regular process, analog improved, subthreshold slope, interconnect menu, etc.

Oh, and I didn't really realize that 22nm doesn't use multiple patterning, at least not for interconnct, there is't all single patterning. No wonder 22nm has such good yields.

http://www.intel.com/content/dam/ww...f/foundry/mark-bohr-2014-idf-presentation.pdf

 

[Sweepr]

From Core i5 6500 Linux review:

Perf/watt:

www.phoronix.com/scan.php?page=article&item=intel-i5-6500&num=1

Skylake does incredible well compared to Haswell in some tests. Core i5 4670 operates at 200MHz higher clocks than Core i5 6500.

 

[Arachnotronic]

From Core i5 6500 Linux review:

Perf/watt:

www.phoronix.com/scan.php?page=article&item=intel-i5-6500&num=1

Skylake does incredible well compared to Haswell in some tests. Core i5 4670 operates at 200MHz higher clocks than Core i5 6500.

I think Skylake is a very good architecture indeed.

 

[frozentundra123456]

Performance per watt looks strange though. The 6600K is so much lower, only slightly better than 4790k. Either the data is bogus, or the efficiency drops off dramatically at (only slightly) higher clockspeeds. It would be interesting to see haswell vs skylake compared directly at a few fixed clockspeeds.

 

[Deders]

Performance per watt looks strange though. The 6600K is so much lower, only slightly better than 4790k. Either the data is bogus, or the efficiency drops off dramatically at (only slightly) higher clockspeeds. It would be interesting to see haswell vs skylake compared directly at a few fixed clockspeeds.

I have just the thing...

Well almost. This shows the clockspeed needed to do specific workloads.

 

[frozentundra123456]

I saw that graph before, but it is confusing to me. Is it showing that under light loads skylake runs at much lower clockspeeds? I don't really understand what is the "y" axis l guess.

 

[ShintaiDK]

They may simply just have used the TDP value for the calculation.

 

[Deders]

I saw that graph before, but it is confusing to me. Is it showing that under light loads skylake runs at much lower clockspeeds? I don't really understand what is the "y" axis l guess.

Pretty much that. Sandra applies increasingly heavy loads (cpu usage goes from 0-100% over several mins), and measures the clockspeed needed to run that load (it's the same load across all cpu's) and puts it in terms of a percentage.

The reason the Skylake chip goes above 100% is because I've overclocked it to 4.6GHz.