There isn't any confusion. 16 PCIE lanes from CPU. 24 from Z[23]70 chipset, or PCH. CPU-PCH is linked by DMI 3.0, equivalent to PCIE 3.0 x4. All the same as before.
I've said the following about sound card: You put the sound card in a slot that uses lanes from PCH. You want to gobble 8 lanes for a sound card that only needs a few MB/s?
Yes, you can have 16 lanes from CPU dedicated to GPU, and a M.2 PCIE SSD and sound card with lanes from PCH, all at the same time.
Now with multiple M.2 PCIE SSDs connected to PCH, if each are individually fast enough and all are simultaneously doing sequential read, DMI 3.0 can bottleneck them.
The more extravagant the expansions, the more you will have to look into which slots are switched. At this point, PEX switch may be needed, and one might ask, is the client platform appropriate for this user?
No, it's ++, which is part of the reason for the all the hopes.
Anandtech 8th gen coverage - mobile Kaby Lake Refresh is 14nm+, desktop Coffee Lake is 14nm++, mobile Cannon Lake is 10nm.ok thanks, any links for that ??
We expect that Intel’s 8th Generation will eventually contain three core designs of product on three different process design nodes: the launch today is Kaby Lake Refresh on 14+, and in the future we will see Coffee Lake on 14++ become part of the 8th Gen, as well as Cannon Lake on 10nm.
Anandtech 8th gen coverage - mobile Kaby Lake Refresh is 14nm+, desktop Coffe Lake is 14nm+, mobile Cannon Lake is 10nm.
I'm excited. I will need to control myself though, I hope to successfully NOT jump on the CFL bandwagon!
From a quick look, there is a little below a 1% performance difference in PCI-e 3.0 x16 and PCI-e 3.0 x8 slots. The difference is not even close to perceptible and should be ignored as inconsequential to users fretting over potential slot or lane limitations.
And here I was thinking that this was expected to last some here for years. Wonder the relative speeds of GPUs in say 5 yrs?http://www.gamersnexus.net/guides/2488-pci-e-3-x8-vs-x16-performance-impact-on-gpus
MSI GTX1080 Gaming X X8 to X16 shows no noticeable difference.
And here I was thinking that this was expected to last some here for years. Wonder the relative speeds of GPUs in say 5 yrs?
That confirms the reported base clock, but that's not the one we want to see.
Serial number, I think. Don't want to be outed as a leaker.LOL, looks like they blurred out someone else logo
@Arachnotronic, You're again, handling Intel with credit while no other company will have the same credit from you.
14+ / 14++ are both marketing thing by definition as they describe point in time for a manufacturing process.
Any process in the past Intel used got better and better in time.
In the past since real features (CPU Features) cadence was high enough there was no need to define point in time for the process.
In our days there is nothing new to put on the table so Intel, doing right for marketing point of view as it works on you, just said let's market in time process by discrete points in time.
The real question here is has the improvements in the 14++ / 14+ are something beyond anything happened in previous processes?
I'd bet not.
But unless you have inside data (Not marketing data, as the logic of those is explained above) don't just throw Intel Marketing agenda as it was the truth, the whole truth and nothing bu the truth.
Yes, we have seen the mobile chips' ability to boost higher, and for longer periods, within the same TDP envelope for 14+ over 14. This was a real-world indication that 14+ was better than 14 as far as overall efficiency. We have also seen the 14+ KL desktop chips have similar efficiency gains over the 14 SL chips. All of this is well known, so I am not sure why it keeps coming up. It was well reported at the time the 14+ mobile chips were released, and at the time the 14+ desktop chips were released.@Arachnotronic, You're again, handling Intel with credit while no other company will have the same credit from you.
14+ / 14++ are both marketing thing by definition as they describe point in time for a manufacturing process.
Any process in the past Intel used got better and better in time.
In the past since real features (CPU Features) cadence was high enough there was no need to define point in time for the process.
In our days there is nothing new to put on the table so Intel, doing right for marketing point of view as it works on you, just said let's market in time process by discrete points in time.
The real question here is has the improvements in the 14++ / 14+ are something beyond anything happened in previous processes?
I'd bet not.
But unless you have inside data (Not marketing data, as the logic of those is explained above) don't just throw Intel Marketing agenda as it was the truth, the whole truth and nothing bu the truth.
Yep, relaxing the gate pitch from 70nm to 84nm, which will lead to some die size increase.
Also note that there's no thing thing as "a transistor". They're all different sizes. If they need to switch fast, or drive a long wire, or drive twenty other transistors, they usually need to be bigger. If they just need to talk to one transistor right beside them, then they can be smaller. Because of this, the "transistor count" metrics are usually just made up - they take the area of the chip, divide by the smallest transistor they can make, and there's you go - an impressively big number for marketing to use.
Well in all the arguing, there is a third possibility-- Probably is some of both. 14nm+ brought gains in mobile brought performance gains similar to some die shrinks. Who knows how much 14nm++ will bring? Obviously, it is a "marketing" point as well, just like every company tries to make its products sound new. That does not mean any gains we see are any less real.Yes, we have seen the mobile chips' ability to boost higher, and for longer periods, within the same TDP envelope for 14+ over 14. This was a real-world indication that 14+ was better than 14 as far as overall efficiency. We have also seen the 14+ KL desktop chips have similar efficiency gains over the 14 SL chips. All of this is well known, so I am not sure why it keeps coming up. It was well reported at the time the 14+ mobile chips were released, and at the time the 14+ desktop chips were released.
There's no reason to think that 14++ is not more efficient again than 14+, regardless of marketing talk or fanboy talk.
Anyway, I don't think calling these intra-node improvements 14+ is something to be ashamed of. They could go and call it 12nm
It is a slight regression if I recall correctly, and that may help with cooling, with a bit larger surface area.It's not a density improvement though, might even be a regression.