Why do you assume that? At this stage, given that the bit error rate / retention quality of fresh (with no few P/E cycles spent) TLC NAND memory isn't remotely supposed to be an issue after the short amount of time it takes to make problem arise, it's still more likely it's due to insurmountable firmware or architectural problems of the NAND controller they designed rather than inherently due to the memory.
If it was the "nature" of TLC NAND, it wouldn't be possible to use these SSDs at the rated P/E limit or above that, because the Bit Error Rate in all NAND memory increases exponentially with wear. At the very least, it would mean that at 1000 P/E cycles performance would start dropping badly almost as soon as data are written.
A test with a "well used" Samsung 840 / 840 EVO would help clarifying this.