Processor Architecture

[Sahakiel]

Originally posted by: ant80

There may be arguments against the design decisions that influenced the P4 core, but these are the technical reasons that influenced the design. I'm sure that the marketing department was not upset about the end result of the P4 design, but it simply did not have an overriding influence on the engineers.

I guess I was confusing that with other matters. Probably was a bit out of line there. Didn't mean it.

But though I might have been wrong about the reason, I still think there is something suspicious about how long they made it. Going from the low 10's to the mid twenties, in effect, completely doubling it, is not something that I know how to explain.

I read somewhere that with a longer pipeline, correcting for clock skew is easier. This apparently isn't too hard until you're taking a chip to insanely high speeds. Pentium IV started at 1.3 or 1.4 GHz and the design is supposed to scale beyond 5 Ghz. 486 chips eventually scaled to over 5x the original clock, if I remember correctly (25MHz up to 133MHz). Pentium hit almost 4x (60 MHz to 233 MHz), Pentium Pro, however, scaled to about 9x (166/180? Mhz to 1.4 GHz).

The Pentium Pro design took about 3 die shrinks, 3-4 different packaging types, a few new chip production technologies, and a demand for the chip that was never around when it was still called Pentium Pro. (Hence, new Xeons) The pipeline is 10 stages long.
The Pentium design hit 233 MHz as the only iteration of the design on a new die shrink (.35 or .25) and after Pentium II's introduction. It really could only take advantage of 1 or 2 die shrinks. The pipeline was only about 3-4 stages long, if I remember correctly.
As for the 486, I have no idea, it just before I got into computers. I'm pretty sure the design was not pipelined. If it was pipelined, it was probably about as long as the Pentium.

My guess is we'll be seeing longer pipelines in general as clock speeds increase, and not just with Intel chips. Pentium Pro about doubled pipeline depth over the Pentium and Pentium IV doubled that yet again. I remember seeing a graph somewhere comparing relative clock speeds of different architectures on the same process. Supposedly, it's relatively equal up until Pentium Pro, where the clock increases 50% over previous generations and 150% for the Pentium IV. Seems as if increasing pipeline depth helps scale raw speed. Performance is a different matter.

From what I hear, Intel has several engineer teams working on different chip designs to be released at different times. In other words, the team that designed Pentium III isn't the same one as the team that produced Pentium IV.
This would probably explain the different design philosophies. I've heard many people mention that Pentium IV was designed for raw speed; the assumption being that raw speed would make up for any inherent deficiencies.

 

[nania]

In defense of Wingznut: Let's not assume a member of this forum and the Anandtech community would purposely skew information that twists the truth to favor Intel. After all, we are all truth seekers here. Now if he were from the Intel Marketing department, there would be cause for concern Seriously, let's treat Wingznut like a scientist and we all know that a scientist is paid to know the truth. We have objective evidence that Intel was right on with their judgement to exploit their superior manufacturing process to scale its CPU higher than AMD could. They were aware that they would get their nose bloodied by the Athlon until they could scale their processor up to where the latency problems inherent in their design would become less significant as the processor got faster. On the other hand, AMD is now faced with the challenge of finding a way to scale up speed and still keep their processors working. You will note from the recent Anandtech articles that as the MHz go up, the Athlon falls further and further behind. This is because the Athlons are not designed to use memory bandwidth well and must make up that deficiency with lower latency and or more and wider registers and instructions to make up the difference. How will you all feel when you have to replace your less than a year old mainboards to take advantage of the new Athlons with built in memory controllers? What about all the software that has to be replaced and updated? If you take those things into account, the Athlon route isn't so cheap anymore. Hyper threading is still in the infant stage and a 50% across the board minimum increase in performance is quite probable with it. Intel will be doubling the L1 and L2 caches in the new P4 and reducing the penalty for a cache miss and also improving Hyperthreading. These refinements will go a long way toward deflecting the Hammer's blow. Sure, the Athlons feel snappier when doing daily tasks but in the real time consuming tasks, Intel is still the superior chip and in many cases by a great margin so if you take the days workload into account, the bottom line is that the P4 will help you get done faster and the situation is likely to worsen for AMD over the next few years. Is it worth paying more for a shorter day? That answer is obvious to me but you can form your own opinion. AMD and Intel are two very competent companies with excellent minds guiding them so don't disparage either. Now that I've said my piece, may I direct you to this thread. Perhaps one of the esteemed colleagues of this forum can present me a definitive response?

 

[Eskimo]

Originally posted by: nania
How will you all feel when you have to replace your less than a year old mainboards to take advantage of the new Athlons with built in memory controllers? What about all the software that has to be replaced and updated?

I would imagine one would feel about the same as when AMD moved from Slot A to Socket A or Intel moved from Slot 1 to Socket 370 to Socket 423 to Socket 478. Not sure what software you are talking about. Hammer will run all your existing software faster than the K7 it replaces. It leaves the decision to move to 64-bit software up to you.

 

[Buddha Bart]

whooo! some real gem's in this one.

pm, wingznut, sochan
thanks

this gives me an idea for another thread

 

[borealiss]

"What about all the software that has to be replaced and updated? If you take those things into account, the Athlon route isn't so cheap anymore. Hyper threading is still in the infant stage and a 50% across the board minimum increase in performance is quite probable with it. Intel will be doubling the L1 and L2 caches in the new P4 and reducing the penalty for a cache miss and also improving Hyperthreading. These refinements will go a long way toward deflecting the Hammer's blow. "

the main thing about hammer is it's 64 bit capability, aside from architectural enhancements from scheduling/pipeline revisions and the onboard memory controller. from what i know, the p4 has nothing to deflect this fact, and that is the biggest card hammer is playing. perhaps from a desktop computing perspective, but not so when dealing with the enterprise sector.

 

[Shalmanese]

Originally posted by: nania
Hyper threading is still in the infant stage and a 50% across the board minimum increase in performance is quite probable with it.

Excuse me? 50% across the board performance? Even DUAL CPU's dont get 50% across the board, unless you define accross the board as DivX encoding and photoshop filters. Hyperthreading AT BEST can get you the equivilant performance of a dual CPU.

 

[imgod2u]

The next version of HT is suppose to offer 4-way SMT. That could definitely provide a 50% increase if not more. Of course, we're talking about if software is well adjusted. Even single-threaded software can utilize a sort of "helper-thread" that Anand described before in his articles to utilize the unused memory address units on the processor while other units are busy. Of course, we'd probably need a fatter decoding stage.

 

[SuperTool]

Originally posted by: imgod2u
The next version of HT is suppose to offer 4-way SMT. That could definitely provide a 50% increase if not more. Of course, we're talking about if software is well adjusted. Even single-threaded software can utilize a sort of "helper-thread" that Anand described before in his articles to utilize the unused memory address units on the processor while other units are busy. Of course, we'd probably need a fatter decoding stage.

What's the area increase from 4-way SMT compared to performance gain from 4-way SMT? I would guess the diminishing returns would kick in pretty fast as you go from 2 way to 4 way SMT. It will be harder and harder to avoid competition for same functional units between two threads.
There might be some scenarios under which you might get 50% improvement over single thread performance, such as running 4 threads each with very low ILP and all utilizing different functional units. Maybe for office type applications this will happen once in a while.

 

[Shalmanese]

The majority of applications find it very hard to even utilise two threads, even if they are specifically coded for it. Quake 3 supports SMP IIRC and it only gained about 5% from going Dual. I dont know of many ther games that do, probably due to negligible performance increases. Sure, encoding compiling and rendering get a hefty gain but, realistically, what percentage of computer users does such stuff? Maybe less than 0.1%. the other 99.9% just decode media, execute programs and view rendered files which is hard to make SMP.

4 way SMP is going to do little if any good for across the board performance.

 

[Buddha Bart]

the other 99.9% just decode media, execute programs and view rendered files which is hard to make SMP

Not if they're done all at once.

I don't want to get into one of those threads where everyone feels the need to one-up each other with how much stuff they have running at once, but I would bet its greater than 4 for most of us. Heck its probably more for joe-sixpack users because they have everything on gods green earth running in the taskbar.

bart