Discussion RDNA4 + CDNA3 Architectures Thread

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DisEnchantment

Golden Member
Mar 3, 2017
1,777
6,783
136





With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits
Or Phoronix

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

 
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MrTeal

Diamond Member
Dec 7, 2003
3,916
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Videocardz

Some renders of the canceled RDNA4 monster GPU.
"The recent visual renders, shared by creper9000, originated from Olrak29‘s diagrams, which themselves drew inspiration from a leaked slide associated with Moore’s Law is Dead. Neither source has had access to the complete diagram or GPU, rendering these visuals purely conceptual and based on tidbits from various unverified sources."

Cool looking renders, but they're basically just someone drawn up based on the MLID rumours.
 
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Ajay

Lifer
Jan 8, 2001
16,094
8,112
136
"The recent visual renders, shared by creper9000, originated from Olrak29‘s diagrams, which themselves drew inspiration from a leaked slide associated with Moore’s Law is Dead. Neither source has had access to the complete diagram or GPU, rendering these visuals purely conceptual and based on tidbits from various unverified sources."

Cool looking renders, but they're basically just someone drawn up based on the MLID rumours.
Too bad. That would have been off the hook cool!
 

PJVol

Senior member
May 25, 2020
852
837
136
Xtor counts are whatever you imagine them to be.
Power/perf/area is all that matters.
Xtors isn't there doing nothing, so depending on implementation they consume power, and in case of rdna3 I suspect this may have contributed to the missed power/perf target.
 
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Mopetar

Diamond Member
Jan 31, 2011
8,431
7,627
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Well, it is a design for a modular GPU, that is scalable, and can scale to performance that a monolithic GPU will have hart time to achieve.
It's probably fine for something like CDNA, but for a consumer GPU it's basically just a better connected version of SLI/Xfire and unless they have figured out how to make that invisible to games as well as highly scalable, it's not workable.
 

maddie

Diamond Member
Jul 18, 2010
5,144
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It's probably fine for something like CDNA, but for a consumer GPU it's basically just a better connected version of SLI/Xfire and unless they have figured out how to make that invisible to games as well as highly scalable, it's not workable.
Why this? Xfire was individual GPUs, this isn't. Do you think any part can function by itself as a GPU?
 

Joe NYC

Diamond Member
Jun 26, 2021
3,184
4,647
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It's probably fine for something like CDNA, but for a consumer GPU it's basically just a better connected version of SLI/Xfire and unless they have figured out how to make that invisible to games as well as highly scalable, it's not workable.
The silicon bridges make the whole thing act a lot more like a monolithic chip than SLI.

But achieving full scalability is likely still work in progress...
 

branch_suggestion

Senior member
Aug 4, 2023
700
1,500
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One of the usual suspects released something silly on RDNA5. Basically repeated everything said ITT spec wise and about the halo part config being basically identical to the original RDNA4 halo, but raises the possibility of moving to 4SA/SE.

This is basically just guessing by them of course, I personally think that decision hinges on the process used for the SED's. N3P seems more likely than N2 as I think AMD will largely skip vanilla N2 expect for high density/low power parts. Whatever comes after Zen6/RDNA5/CDNA4 is likely all in on N2P.

RDNA4 was the one which was supposed to introduce this big new paradigm with the big boy parts, but that has been delayed to RDNA5, which was probably always intended to use the same high level layout with the focus on the core logic.
RDNA4's core logic appears to be an evolution of RDNA3 with RDNA5 probably being more revolutionary, so I think AMD will stick with 3SA/SE assuming the hierarchy is the same.
 

SolidQ

Golden Member
Jul 13, 2023
1,445
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From Mlid, but anyway i think it's possible 64CU for N43, if here was post about N41 is 270CU, but white text is not 100% confirming
 
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jpiniero

Lifer
Oct 1, 2010
16,459
6,921
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You have to remember that it's pretty likely that Blackwell "midrange" is not going to be substantially faster than Ada. 64 CUs, especially if they fix it, would be too much even.
 
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