Except that isn't coming until Excavator. Did you not read the AnandTech article on Steamroller?
So no, that is decidedly not where credit is due. And you should know that an automated process generally results in lower performance/clock speeds over a hand-tuned process.
Makes Kabini roughly twice the cost to produce as Bobcat.
That's it .Does it even matter if it cost 15$ instead of 8$ if it can be sold
for 50 instead of 30 ?.....
28nm is not 35% more expensive than 40nm in a mm2 basis.
Makes Kabini roughly twice the cost to produce as Bobcat.
Really...And what is GloFo's defect density for you to make claims like this?
Makes Kabini roughly twice the cost to produce as Bobcat.
So if Glofo manage only 1% yield AMD would have to pay
the chips accordingly..?..
You are not serious....or clueless.
Well if these performance increases are not being helped by automated design somehow, someone in AMD sold their soul or did some crazy stuff for these improved chips.
didn't amd strike a deal with glofo (and paid money) so they only pay money for working wafers/chips ?
Those are two different issues altogether, not to be correlated or connected in any sort of "cause and effect" linkage. When they do happen to occur at the same time, it is simply coincidence.
Lower "theoretical speed" is based on the inherent limitations within the design - sans the additional limitations imposed by less-than-ideal electrical parametrics from the process node itself.
Lower "actual clock speed" is based on inherent limitations imposed by process variability (or simply a failure to hit targeted parametrics entirely) at the hands of the fab.
At the end of the day both conspire together in a sort of multiplicative effect to reduce the final clockspeed envelope.
Makes Kabini roughly twice the cost to produce as Bobcat.
Kabini/Temash die size: 11.1 mm x 10.2 mm = 114 mm2
http://www.theverge.com/2013/1/7/3848896/amd-temash-reference-tablet-hands-on-pictures#3913369
http://tweakers.net/nieuws/86510/amd-draait-dirt-showdown-op-full-hd-tablet-met-temash-apu.html
Hans.
Brazos,
75mm cpu/gpu "SOC"
28mm FCH
total 103mm
Kabini
114 mm
CRYSIS AVERTED
people just need to count, 256 GCN cores would be extremely unlikely, nowhere near enough bandwidth on a 64bit memory system. the massive pin increase from brazos to kabini is likely all I/O that was on the FCH.