Richland & Kabini rumours

[Nemesis 1]

As long as you dont use Intel's compiler - there are lots of others- you can use AVX including VEX-prefix-instructions, also on AMD chips. They are 100% compatible.

Soon intel should also provide a compiler option for "slow-AMD-AVX" code. Even if it is slower, it will of course use the VEX-prefix. Prefixes are hardware, you are talking about software.

Funny side note: The y-crunsher programmer mentioned above, stated, that Microsoft's compiler generates better/faster AVX256 code for intel CPUs than intel's compiler ;-)

NO you can not. you go know and get a link . prefix of vec does nothing on an amd machine , AMD has its own prefix

 

[Nemesis 1]

Oh man, my fail to even trying to respond to that poster. Won't happen again,let him fall into the hole he dug out himself .

For those who are interested in VEX prefix/coding scheme,wikipedia is the easiest source.


PS The guy cannot discern what is a compiler ( a piece of software) and what is an instruction coding standard(what VEX is)...

Man oh man . YOUR lieing tell the mods I said that it should be a ban unless your lieing

Nemesis, my day; nay, my life is too short to be dealing with whatever crazy you're peddling right now. For thread crapping and yelling like a madman, please take the next week off
-ViRGE

 

[Nemesis 1]

In May 2009, AMD announced a revision of the proposed SSE5 instruction set to make it compatible with the AVX instruction set and the VEX coding scheme. The revised SSE5 is called XOP.[6]
Here is AMDs prefix XOP . Now if you can get AMDs white paper thats states that this prefix XOP does exactly whate intels white paper states about intel prefix of vex. your swimming against a waterfall

 

[cytg111]

Man oh man . YOUR lieing tell the mods I said that it should be a ban unless your lieing

you should not get into these heavy deep discussions while under the influence, just saying, you're gonna regret it later!

 

[inf64]

you should not get into these heavy deep discussions while under the influence, just saying, you're gonna regret it later!

You said it! Someone had to,it's very obvious.
BTW user now mixes XOP instruction set which uses VEX coding scheme rolleyes with the coding scheme itself. It's now pointless to discuss this thing any more since it's like trying to explain something to someone who has absolutely no idea about the topic at hand.

 

[Nemesis 1]

You said it! Someone had to,it's very obvious.
BTW user now mixes XOP instriction set which uses VEX coding scheme rolleyes with the coding scheme itself. It's now pointless to discuss this thing any more since it's like trying to explain something to someone who has absolutely no idea about the topic at hand.

Just stop Its all most as bad as saying I don't know compilers are software. I am talking about the prefix only . Intel prefix will not work with an AMD processor it will be flagged. We did this already and it was clearly shown that AMDs XOP is nothing like Intel vec prefix . We showed it in the white paper in this forum already

 

[VirtualLarry]

Oh man, my fail to even trying to respond to that poster. Won't happen again,let him fall into the hole he dug out himself .

PS The guy cannot discern what is a compiler ( a piece of software) and what is an instruction coding standard(what VEX is)...

Nem gets busted again.

 

[itsmydamnation]

JUST STOP! I am not talking about the instruction set. THE prefix of vec or vex is an intel exclusive. It works with intel hardware/Software together. AMD does not have this software or hardware . They may have a prefix but its not Vec. .Its for auto recompile i believe at run time not sure.So now your going to say AMD has intel compilers. I know they can run intel compilers but it won't work the same and its legal. This is not the result AMD NV wanted when they complained to FTC about intel compilers . The change intel had to make . to make FTC happy Intel had label the compilars as not performing as well on none Intel products . A big win for intel

is all your ranting and raving because intel control the vex name space, if so to you. imaging how simple it would be to say, intel control the vex name space. instead we get pages of incoherent jabber. Instruction encoding really is such a non issue, further more i cant see where inf64 has lied at all, so all we have in incoherent slander from you.

 

[Nemesis 1]

http://software.intel.com/en-us/articles/using-intel-avx-without-writing-avx

 

[Nemesis 1]

is all your ranting and raving because intel control the vex name space, if so to you. imaging how simple it would be to say, intel control the vex name space. instead we get pages of incoherent jabber. Instruction encoding really is such a non issue, further more i cant see where inf64 has lied at all, so all we have in incoherent slander from you.

No , Intel stopped AMD from using spaces in the Vex space by reserving those spaces for future expansion to 512 /1024. I not sure but I not aware Amd has Intel math libraries. I posted a link to intel . This debate is about this AMD XOP does the exact same as intel vex prefix . it does not now or ever will . As for Slander no . The AMD fellow played this exact same game and lost. The info is freely available ratheer than research he jumps in and makes false statement . Thats lieing Being ignorant is an excuss only when you can not access the information . He jumped in on the bases he knows better without researching what intel states in its white papers . Over 900 pages I call lazy also

 

[itsmydamnation]

yes and? do actually understand what that article is taking about?

No , Intel stopped AMD from using spaces in the Vex space by reserving those spaces for future expansion to 512 /1024. I not sure but I not aware Amd has Intel math libraries. I posted a link to intel . This debate is about this AMD XOP does the exact same as intel vex prefix . it does not now or ever will . As for Slander no . The AMD fellow played this exact same game and lost

again your making no sense, who cares about header extentions in C++ , what does that have to do with anything inf64 said. Infact your just re-enforcing his point. Have you ever considered the Dunning–Kruger effect and people jsut get sick of waisting thier time.

 

[VirtualLarry]

If AMD "invented" x86-64, and Intel has a patent cross-license with AMD to use that technology, then why wouldn't AMD CPUs be able to decode and run opcodes that use the VEX prefix?

 

[itsmydamnation]

is that you Nemesis 1,
so after all of that crap, we are back to intel control the VEX name space. XOP in effect follows the same schema but is out side the vex namespace whoopty do, whats your point.

assuming that this is Nemesis 1 what does your link or C++ headers have to do with instruction encoding formats? again Dunning–Kruger effect buddy, im about to do the same, i guess you will see that as VICTORY.

 

[SocketF]

No , Intel stopped AMD from using spaces in the Vex space by reserving those spaces for future expansion to 512 /1024.

Who cares? AMD found some space for XOP, didnt they?
Still not many programmers are using XOP anyways, and after Haswell with AVX2 & FMA is out then there is no reason to use it either, because XOP is kind of AVX2 limited to 128bit and a few missing instructions.

 

[Idontcare]

If AMD "invented" x86-64, and Intel has a patent cross-license with AMD to use that technology, then why wouldn't AMD CPUs be able to decode and run opcodes that use the VEX prefix?

Pretty sure the patent license would be specific in tems of the patent numbers that are cross-licensed. I doubt Intel agreed to grant license rights to each and every Intel patent on file at the time in addition to an open-ended license rights to any and all future patents.

[redacted]

XOP may do what vex does, but presumably the code must be compiled to know or care that they are to be treated as interchangeable.

Intel could make their compilers be vex-aware, but if AMD processors are not vex-licensed/compatible then the code would not be required to run on a XOP path.

Other compilers (PGI, GCC, MS) may opt to do that work for AMD processors but with <20% marketshare those companies are probably going to invest money making their compilers more competitive on Intel chips before worrying about unlocking performance potential of AMD chips.

Shame on you for quoting the spam, Administrator
-ViRGE

 

[inf64]

Is that rtuuji poster actually Nemesis with double account or what(registered just now,same post style,sentence structure etc.)? I thought that having double forum accounts is forbidden by forum rules? Some admin needs to step up and do something about this guy ,sooner or later. Sorry I had to say this ,other users in this thread also noticed it and tried (pointlessly) to reason with him.

He's a Chinese spammer.
-ViRGE

 

[Nemesis 1]

Is that rtuuji poster actually Nemesis with double account or what(registered just now,same post style,sentence structure etc.)? I thought that having double forum accounts is forbidden by forum rules? Some admin needs to step up and do something about this guy ,sooner or later. Sorry I had to say this ,other users in this thread also noticed it and tried (pointlessly) to reason with him.

LOL With my posting history and banning If I came in with another Account They would catch it right now . When I made this account . wilson had me befor my first post he said i could stay but not to play these guys as fools. I made that promise and have stuck to it. You on the other hand have an agenda . I just a sick old man

 

[Phynaz]

Shame on you for quoting the spam, Administrator
-ViRGE

One week ban! :biggrin:

 

[Idontcare]

Shame on you for quoting the spam, Administrator
-ViRGE

One week ban! :biggrin:

Seconded, ViRGE needs a one week ban, minimum

LOL, guess I fell for the spammer there, next thing ViRGE is going to tell me this Nigerian prince that just emailed me isn't really going to come through for me Oh well, at least I gots my eyes on a cheap supply of Viagra, or so some dude from Canada keeps emailing me about

I just a sick old man

You are begging to be have that pimped out as a sig

 

[deltree86]

Can't AMD just do something that can make sure their processors match a 2 core intel i3 in the same price range....

 

[NTMBK]

Can't AMD just do something that can make sure their processors match a 2 core intel i3 in the same price range....

It's called an A10-5800k.

 

[parvadomus]

I have one theory about AMD not releasing any steamroller core already. It's just to clear inventory, SR would canibalize AMD current products, what we might see is some binned 8350 dies into 8370, and maybe the same happens to some richland models?.
Also, I would like to see a 10-core SR high-end part to counter intel 39xx , a quad-channel platform just for that.

 

[zlatan]

You have A link for that . I don't believe it . AVX2 is intel exclusive for now It would suite intel better to just recompile and not use HSA. Intel can use Hsa When it NEEDS to . NOW would be stupid . On recompiles Intel has the prefix of vec advantage that AMD will never ever have Prefix of vex it will remain intel exclusive . Intel may have to share the instruction set . But the prefix of vex is a combination of instruction set AMD can use . Hardware and Software INTEL does not have to give this to AMD and they will not.

The "recompile" bullshit is just pure marketing. You must change the source code to gain advantage from AVX or AVX2. The main reason why Intel pushing OpenCL so hard is AVX.
AVX(2) is actually a data parallel ISA, which is steal a lot of idea from the GPU. If you want to run an AVX(2) code efficiently, than you must write it in OpenCL, or use an OpenCL like execution model. Recompiling the code has no value, this is the reason why there are only 5 or 6 AVX program in the market.
AMD can use AVX2 if they want, just like they implemented AVX. The problem is Larrabee. The Knights Corner intruduced LNI, which use 100 parameterized instruction, and this ISA questioning the legitimacy of SSE/AVX.
As a software developer I more interested in HSA. I want to write the code once, and run it everywhere. Even on Intel, because HSA runtime will have a legacy mode, maybe it will automatically use AVX/AVX2.

 

[krumme]

I have one theory about AMD not releasing any steamroller core already. It's just to clear inventory, SR would canibalize AMD current products, what we might see is some binned 8350 dies into 8370, and maybe the same happens to some richland models?.
Also, I would like to see a 10-core SR high-end part to counter intel 39xx , a quad-channel platform just for that.

Man i wish i could think like that

 

[piesquared]

What's with all the censorship of this thread? The posts that were deleted were not in any way off topic posts or spam. I don't think I've ever seen that happen on AT before. Sure is interesting and entertaining to watch though from certain perspectives.


So with 20-40% performance improvement, Richland is starting to look like a strong product. With a high end 4.4GHz clock speed and lower power consumption, improved Piledriver cores, Radeon graphics engine and new algorithms likely in part as a result of John Gustafson's work, combined with new software designed for APU's, Win8 and all day battery life, these systems will likely sell very well.

There's also a great article here on professional grade tablets, that suggests these devices are set for rapid growth as well. Considering AMD is at least 6 months ahead of intel having anything really competitive, x86 tablets will very likely be owned by Temash and Kabini.

http://tabtimes.com/analysis/ittech...tabtim.es-twitter&utm_content=awesm-publisher