Question Speculation: RDNA2 + CDNA Architectures thread

[uzzi38]

All die sizes are within 5mm^2. The poster here has been right on some things in the past afaik, and to his credit was the first to saying 505mm^2 for Navi21, which other people have backed up. Even still though, take the following with a pich of salt.

Navi21 - 505mm^2

Navi22 - 340mm^2

Navi23 - 240mm^2

Source is the following post: https://www.ptt.cc/bbs/PC_Shopping/M.1588075782.A.C1E.html

 

[Glo.]

kopite says its n21. If true that means it has to be a 512 bit bus with 16gb of vram. tbh 384 bit isnt enough for 80cu. This has to either be n21 at 512 bit or its n23 at 256 bit.

It is not big Navi. 256 bit GPU is simply Navi 22. N21 has 384 bit bus. N23 has 192 bit bus.

 

[DiogoDX]

He could be wrong, could be disinformation, could be very cut down n21, or n21 might not be the 80cu top die

Xbox has 52cu with 320bit, ps5 has 36 with 384. AMD is not releasing an 80cu with a 256 bus.


Also even though the sticker says 16gb, we can't verify that. What's to say this card should have 16 1gb chips, dual sided, but instead it has 8 single sided only for testing purposes

PS5 is 36 CU 256bits.

 

[Helis4life]

PS5 is 36 CU 256bits.

Right you are, shows what happens when you believe the word of tech tubers without verifying

 

[Saylick]

He could be wrong, could be disinformation, could be very cut down n21, or n21 might not be the 80cu top die

Xbox has 52cu with 320bit, ps5 has 36 with 384. AMD is not releasing an 80cu with a 256 bus.


Also even though the sticker says 16gb, we can't verify that. What's to say this card should have 16 1gb chips, dual sided, but instead it has 8 single sided only for testing purposes

Just a quick correction: PS5 uses a 256-bit bus. not 384-bit. With that said, I would hope AMD uses a 512-bit bus on GDDR6 (non-X) to keep the bandwidth roughly inline with Navi 10. Any shrinkage in bus width should be made up with architectural improvements and/or faster clocked memory.

 

[leoneazzurro]

Just a quick correction: PS5 uses a 256-bit bus. not 384-bit. With that said, I would hope AMD uses a 512-bit bus on GDDR6 (non-X) to keep the bandwidth roughly inline with Navi 10. Any shrinkage in bus width should be made up with architectural improvements and/or faster clocked memory.

Well it is already rumored that AMD will use 16Gbps GDDR6 instead of 5700XT's 14 GBps

 

[maddie]

How certain is everyone that N21 is the biggest die? The reason I ask this is that in recent times, AMD has named their die based on when started, not their place in the performance table.

I know this flies against everything we think we know so far, but the level of illogic in all we're being told about Navi details, indicates to me a very effective campaign to fool all with contradictory information. Can anyone say for sure that they know anything about Navi2? Release date excepted.

 

[Stuka87]

Or 1024... 😁 Nah, it's gddr 6 this time around

So are you saying there won't be an HBM based chip at all? I thought farther back in the thread that it was thought the 80CU card would use HBM, and the two smaller chips would be GDDR6?

 

[kurosaki]

So are you saying there won't be an HBM based chip at all? I thought farther back in the thread that it was thought the 80CU card would use HBM, and the two smaller chips would be GDDR6?

Nah, the compute cards will probably use it. My bet is GDDR6 right through.

 

[Saylick]

Well it is already rumored that AMD will use 16Gbps GDDR6 instead of 5700XT's 14 GBps

16 Gbps is a nice improvement over 14 Gbps (~15%) but it's not as good of an improvement of a 33% wider bus (512-bit vs. 384-bit). AMD will need to make up for that delta via architectural improvements if they don't want a regression in bandwidth per FLOP if they double to 80 CUs over Navi 10.

 

[Helis4life]

if you look closely you can see that the retention bracket for that die is much larger than the 5700xt die. its huge, and that pcb is higher too. It can fit 3 ram modules between the legs of the bracket, on each side. In comparison
5700xt bracket could only fit 2. Maybe samsung 16gb refers to hbm

 

[Konan]

How certain is everyone that N21 is the biggest die? The reason I ask this is that in recent times, AMD has named their die based on when started, not their place in the performance table.

I know this flies against everything we think we know so far, but the level of illogic in all we're being told about Navi details, indicates to me a very effective campaign to fool all with contradictory information. Can anyone say for sure that they know anything about Navi2? Release date excepted.

Well the 505mm2 and the only source of die sizes came from here (he works for ASE Group)
Twitter KatCorgi questions the size too

https://twitter.com/x/status/1303986125225095169

And regarding the original source of the that Engineering Sample and comments:


Specifically calls it Big Navi (say he fixing the VRS bug of big Navi / He can't run 3Dmark because working on Android/ Linux system)
Wouldn't have called it if Big Navi if it was N22...
So to answer your question, no not really

 

[GodisanAtheist]

And the leaks begin...

Random thoughts:

- Do we know RX 6000 and Xbox SX dies are built using the same manufacturing process (I know its all 7nm, but TSMC has a couple variations)? Possible that some of the efficiencies we see on the xbox part are the result of it having to be made on whatever AMD uses to manufacture its CPUs?

- I have to assume GDDR6 is fairly cheap and plentiful now (compared to HBM and GDDR6X) and whatever 7nm process AMD uses is fairly refined. AMD's strategy might be to throw tons of "cheap" RAM on their cards and up bandwidth on the bus side of the equation. If I recall correctly, AMD's engineers actually pulled off a similar feat with the old Hawaii part where its 512-bit bus was only marginally larger than Tahiti's 384-bit bus or something similar.

-I was always under the impression that the 300w cap on cards was to do with the PCI-E logo spec. If NV has thrown that out the window, does that mean that is no longer a hard and fast requirement? Besides good old fashioned physics, anything stopping AMD/NV from manufacturing an "efficient" card that consumes 350 or 400 watts?

 

[DiogoDX]

if you look closely you can see that the retention bracket for that die is much larger than the 5700xt die. its huge, and that pcb is higher too. It can fit 3 ram modules between the legs of the bracket, on each side. In comparison
5700xt bracket could only fit 2. Maybe samsung 16gb refers to hbm

AMD Radeon RX 5700 XT Review

The AMD Radeon RX 5700 XT is based on AMD's all-new Navi 10 GPU featuring the RDNA architecture. We thoroughly test the card's gaming performance and look at power, heat, noise, overclocking, and clock frequency stability, too, sometimes with surprising results.

www.techpowerup.com

3 modules on the 5700XT pcb.

 

[Helis4life]

AMD Radeon RX 5700 XT Review

The AMD Radeon RX 5700 XT is based on AMD's all-new Navi 10 GPU featuring the RDNA architecture. We thoroughly test the card's gaming performance and look at power, heat, noise, overclocking, and clock frequency stability, too, sometimes with surprising results.

www.techpowerup.com

3 modules on the 5700XT pcb.

The 3 5700 modules arnt between the legs, they're outside the legs. Look again at the Navi PCB, modules are all inside the legs

 

[DiogoDX]

Now I see it.

 

[Konan]

Well well well.. What’s going on here?

https://twitter.com/x/status/1304252347871367171

 

[maddie]

Well well well.. What’s going on here?

https://twitter.com/x/status/1304252347871367171

I tell you, there must be some group out there laughing their rears off.

 

[Konan]

Thinking... Maybe it’s smaller than 505mm2 now on the other hand is it really N22?

 

[Tup3x]

There's always the possibility that certain people have set their expectations too high...

 

[leoneazzurro]

There are some things to consider:

- Navi 22 is rumored to be a 60CU part with 256 bit bus. So this is bigger than Navi10 but it is not the "highest end" part
- There was a rumor about no Navi21 boards from AIBs until next year, only reference boards
- Since April there is a rumor about Navi21 having four variants, XTX, XT, XL and XE - "E" moniker was used in the past for SKUs with top chip but with memory interface being severely cut down, like the 5600XT (this one should really be called "Navi 10 XE" in this regard)
- 128 ROPs are simply too much for only 256bit bus, especially for AMD which has always been conservative in this regards. No one wants to spend die area (and here we are speaking about a doubling of Render Back Ends, not a trivial thing) for something that will remain largely unused.

So I'd wait for the revealing of the actual configurations before saying "WTF"

BTW, even with a 256 bit bus a 80 CU part should be around 450mm^2. So IDK if that's "much smaller".

 

[exquisitechar]

Navi21 doesn't have a 256-bit bus. The part in the leaked photo is Navi22.

https://twitter.com/x/status/1303999999114579968

Navi21 is about 505mm^2.

 

[Timorous]

BTW, even with a 256 bit bus a 80 CU part should be around 450mm^2. So IDK if that's "much smaller".

Only if the xtor density is the same as RDNA which would make it lower density than Ampere.

AMD / TSMC have already shown they can have a much denser part with great clock, power and thermal characteristics in the form of Renoir.

 

[leoneazzurro]

This is assuming that AMD and Nvidia count transistors in the same way.

 

[Glo.]

AMD is quite possibly doing the greatest "Jebaited" tactic ever executed in leaks .

 

[kurosaki]

If we have a look at the Xbox 12 TF 52 CU variant, a 80 CU GPU should therefor add up to approx 19TF at the exact frequenzy, of course. Wonder how many Nvidia TF measures up to one AMD-TF..