Interesting, looks like Wikipedia is wrong. I had to read a bit to find out why. DDR4 still uses an 8n prefetch but it can use groups of banks (2 or 4) - so that’s how the IO rate is doubled with the same base clocks on the sdram chips.
Interesting, looks like Wikipedia is wrong. I had to read a bit to find out why. DDR4 still uses an 8n prefetch but it can use groups of banks (2 or 4) - so that’s how the IO rate is doubled with the same base clocks on the sdram chips.
So it's running at 3200MHz out of the box. Latency is 80ns for this early sample, not too bad, in my opinion.
Yeah I'm looking at the 12 core also. Really depends on how well the infinity fabric holds up though. That's the key.
Interesting, looks like Wikipedia is wrong. I had to read a bit to find out why. DDR4 still uses an 8n prefetch but it can use groups of banks (2 or 4) - so that’s how the IO rate is doubled with the same base clocks on the sdram chips.
So it's running at 3200MHz out of the box. Latency is 80ns for this early sample, not too bad, in my opinion.
Well, but, it's not fabulous either. 60ns would have been nicer to see this gen considering it's up against the 9900k.
ed: FWIW, I just downloaded and ran these tests locally. Obviously I don't have a gaming rig :> https://www.userbenchmark.com/UserRun/16928302
Anyway <90ns to memory and 10ns L3.
[ed2: oh, 15ns is L3, not inter-die w/ corresponding edits and implied head-slaps]
I thought the Zen2 was supposed to double L3 to 32MB? So, is what I'm seeing in the original link higher L3 latency and terrible inter-die latencies? As in, it's practically cheaper to go back to RAM latency?
These are engineering samples, and it had a boost clock lower than base clock. I think it's a little early to be drawing conclusions.
But... if it remains that way, AMD has a huge problem, IMO.
I thought the Zen2 was supposed to double L3 to 32MB? So, is what I'm seeing in the original link higher L3 latency and terrible inter-die latencies? As in, it's practically cheaper to go back to RAM latency?
Probably not going to be much worse than it already is, so much of the latency is taken up in the actual coherency, thats one of the big changes for Rome only one big home agent taking care of all of this not 4 small ones.In some cases an 8c Zen2 might be faster due to intercore latency. So yes, IF latency is going to be something to watch.
Thats how cache coherence protocols work for the most part, its far safer to flush back to memory and then reread to ensure you have the correct data.As in, it's practically cheaper to go back to RAM latency?
While MOESI can quickly share dirty cache lines from cache, it cannot quickly share clean lines from cache. If a cache line is clean with respect to memory and in the shared state, then any snoop request to that cache line will be filled from memory, rather than a cache.
If a processor wishes to write to an Owned cache line, it must notify the other processors that are sharing that cache line. Depending on the implementation it may simply tell them to invalidate their copies (moving its own copy to the Modified state), or it may tell them to update their copies with the new contents (leaving its own copy in the Owned state).
No, it's 3200 MHz but according to Looncraz it might have a really high CAS latency of CL22 or CL24. If that's true the actal latency would be between zen and zen+Did I see correctly those were benched with DDR 1600? No Wonder it is a bit slow.
Yup, the other reddit poster did a great job with finding the exact spec data for the new Micron memory: its CL22/24 for operating at 3200MT/s.No, it's 3200 MHz but according to Looncraz it might have a really high CAS latency of CL22 or CL24. If that's true the actal latency would be between zen and zen+
I would stay a bit more conservative about that, be confident about DDR4-4000 and hope for incremental improvements towards something like 4200-4400.If Zen2 can run DDR4-5000 with "reasonable" timings, I would expect much lower latency. The potential for tuning will be there.
Well, but, it's not fabulous either. 60ns would have been nicer to see this gen considering it's up against the 9900k.
ed: FWIW, I just downloaded and ran these tests locally. Obviously I don't have a gaming rig :> https://www.userbenchmark.com/UserRun/16928302
Anyway <90ns to memory and 10ns L3.
[ed2: oh, 15ns is L3, not inter-die w/ corresponding edits and implied head-slaps]
I thought the Zen2 was supposed to double L3 to 32MB? So, is what I'm seeing in the original link higher L3 latency and terrible inter-die latencies? As in, it's practically cheaper to go back to RAM latency?
Another X570 promotion....Er....leak.
This has active cooling that can be turned on or off too. Not sure if this is a good thing or bad thing.
https://www.google.com/amp/s/wccfte...-series-x570-gaming-motherboard-pictured/amp/
The last one had a fan too right? I hope this does not come back.
Yeah, the Biostar x570 also had a fan. I'm not buying motherboards with fans, screw that.
I wonder if it's driven by pcie4?
Looks to me the x570 is hot as hell.
Just wondering your opinions, I understand the fan is another thing that could fail and another thing that generates noise but isn’t more cooling what’s needed on the x470’s?