Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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tsamolotoff

Member
May 19, 2019
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. I’d love dual CCD VCache for certain productivity workloads. It would help compensate for the 16 cores being membw constrained by dual channel memory.
According to my personal tests, x3d at relative minus 200 mhz is roughly equal to non-extra-cache cores in 100% membw sparse matrix multi algo, so it's not that much to be honest.
More importantly than us talking about a very fast X3D part: it nullifies the weird scheduling business needed for Zen 4 parts on X3D parts. If both CCDs can hit the same frequency, then the V-Cache CCD (aside from some extreme niche cases) will always be the faster CCD. Which means AMD just needs to rely on regular old CPPC to handle allocating workloads to cores, no need for the Game Bar nonsense we had last time.
You don't really need the game bar, just set the driver (or bios) to 'prefer cache', it basically emulates one-ccd design in this case. What you actually need (and what driver/gamebar etc not always (almost not ever, really, at least on W10) provide) is to keep certain games / apps on cache-only ccd (cs2 for example), as spreading threads between ccds essentially limits the performance to non-x3d level (or even worse).
If both CCDs can hit the same frequency, then the V-Cache CCD (aside from some extreme niche cases) will always be the faster CCD
X3D chiplet is already a higher quality one (especially if you have post-release 7950x3d), it's just ACPI table configured by default in such a way that inferior-quality CCD1 takes precedence. As I said above, just swap it to 'prefer cache'.
 
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