N3e.Then what process will that SoC actually use?
Well it's named -halo for a reason.It won't be small either.
Depends on how much cash AMD is willing to pour to prop the segment into viability.Going to be interesting to see if they can get OEMs to really use this versus just throwing on a cheesy nVidia GPU like they are now.
8 full Zen 5 cores with their full L3 is more than capable enough for a laptop. The CCD may have a V-Cache option as well.I can agree with more than a single SKU, but will they really go down to 8 cores?
Yes, you could use only a single CCD, but the reason why I am sceptical about that is the existence of Strix Point. That one will have 4 Zen5 + 8 Zen5c cores, so Strix Halo with only a single CCD would be slower in the CPU department.
I see a possible lineup like this:
Strix Halo: 16 Zen5, 40CU RDNA3.5, 256-bit LPDDR5x
Strix Halo: 14-16 Zen5, 36CU RDNA3.5, 256-bit LPDDR5x
Strix Halo: 12 Zen5, 32CU RDNA3.5, 192-bit LPDDR5x
Strix Halo: 10-12 Zen5, 24CU RDNA3.5, 192-bit LPDDR5x
Strix Point: 4+8Zen5(c), 16CU RDAN3.5, 128-bit LPDDR5x
Strix Point: 4+6Zen5(c), 12CU RDNA3.5, 128-bit LPDDR5x
Strix Point: 4+4Zen5(c), 8CU RDNA3.5, 128-bit LPDDR5
Product like large APU is not only for laptops.8 full Zen 5 cores with their full L3 is more than capable enough for a laptop. The CCD may have a V-Cache option as well.
Yes but it's more SKUs. Annoying.
No.The cost saving measures of integrating CPU + dGPU + DRAM (from 2 dedicated sets) all into one package should be a good value proposition for OEMs
Yes which is what they want to avoid.it would shift more of the notebook BOM to AMD.
All FP10 parts are 256b.
If they are willing to use N3e for SoC, then I would expect the same also for the CPU tiles. At least, I am sure this won't be cheap.N3e.
Well it's named -halo for a reason.
Depends on how much cash AMD is willing to pour to prop the segment into viability.
Product like large APU is not only for laptops.
Its a mobile first design that can scale up, not down. Most of it however will go to laptops, obviously. But use cases for product like Strix Halo are more than just laptops.
If anyone remembers what I was talking about few months ago that there is coming paradigm shift in mainstream computing - those people should know what products like Meteor Lake-P and Strix Halo are for.
I didn't say 8 Zen5 cores won't be capable enough per se, It's more about how would you price It.8 full Zen 5 cores with their full L3 is more than capable enough for a laptop. The CCD may have a V-Cache option as well.
16 cores would be just for halo effect, just for the longest bar on some MT benchmarks, not for anything super practical.
I think the main point is to integrate dGPU level graphics at lower cost and lower power consumption than adding dGPU.
Let's say for gaming notebooks. 8x Zen 5 cores + full graphics capability would serve a decent sized niche.
Yes which is what they want to avoid.
Product like large APU is not only for laptops.
Its a mobile first design that can scale up, not down. Most of it however will go to laptops, obviously. But use cases for product like Strix Halo are more than just laptops.
Yes.Is that the name of the new socket?
They don't need to.then I would expect the same also for the CPU tiles
It's an inherintly niche product, even 5 design wins would be something.AMD may release a leading product in a segment and still not get past 20% market share in the segment where it has a leading product
Eyyyy Stacy is a cool guy. Shush.There is more to managing a profitable company than pleasing one GM obsessed analyst at CC (Stacy Rasgon)
No, it's for premium 15/16" thins first and foremost.Strix Halo seems only really suited for gaming laptops
If they are willing to use N3e for SoC, then I would expect the same also for the CPU tiles. At least, I am sure this won't be cheap.
This.The question is if AMD made a dedicated CCD for Strix Halo
It is a redesign (not a new floorplan, just a tiny link swap).I think the likelihood is that this is not a fully redesigned CCD that stripped out the GMI lins from the die area
Atta, that one does HB with tiny pitches that allows to connect ingest ring SDP directly to the underlying fabric tile.Most likely just redesigned metal layers, same as what AMD did with Zen 4 for Mi300.
I didn't say 8 Zen5 cores won't be capable enough per se, It's more about how would you price It.
What price would you set for 8 Zen5 + 40CU RDNA3.5 vs 12 Zen5 + 32CU RDNA3.5
or 4+8Zen5 +16CU RDNA3.5?
Then there is still the question of how good would 8 Zen5 be against the competition?
Strix Halo should compete in GPU perf terms with 4050, 4060 and 4070 laptop GPUs.I don't think AMD will be going much below full 40 CUs. 1 vs. 2 CCDs is going to be the main segmentation.
I think 8 Zen 5 CCDs with the strong GPU capability could be the sweet spot for gaming capable notebooks.
Eyyyy Stacy is a cool guy. Shush.
@Joe NYC You still pining away at writing an email to st nicholas/st su for a 16c die for consumer?
This.
IFOPs go out, USR goes in.
It is a redesign (not a new floorplan, just a tiny link swap).
Atta, that one does HB with tiny pitches that allows to connect ingest ring SDP directly to the underlying fabric tile.
No can do that with 2.5D pkg.
Itll be cheaper than implementing Intel and Nvidia GPU combo.Even AIOs these days are IGP only. Strix Halo seems only really suited for gaming laptops. Strix Halo is going to be too expensive for any other segment.
So good for shareholders, and Lisa is a bigtime shareholder...
No it's just doing more effort for negligible packaging area gains.Integrating DRAM in package would be a nightmare scenario for Stacy, since it would lower GMs. But at the same time increase AMD revenue and EPS, even if AMD can charge only a 5% mark-up on that DRAM.
PHY swaps aren't quite that.That seems like quite a serious effort
No you stick a fat PHY in and let it run lowest link states outside of heavy loads.So, in theory, eliminating GMI / IFoP from both sides can result in some die area savings and those savings alone can pay for Fan Out packaging...