Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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Tigerick

Senior member
Apr 1, 2022
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Geez, can we stop all the non-sense talks above? I may not agree 100% with adroc but he is at least knowledgeable and willing to share his opinions. At least he admit he maybe wrong about Zen 5's pricing prediction But I believe his pricing in RDNA4, you have to judge yourself what to believe. If you don't then you could argue with him...I even suggest AMD should bundle X3D with Zen5 cause with total performance degradation, AMD will face similar fate with Zen4's launching if they intend to launch Zen5 with similar prices.....at least this is my opinion
 
Jul 27, 2020
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I even suggest AMD should bundle X3D with Zen5 cause with total performance degradation, AMD will face similar fate with Zen4's launching if they intend to launch Zen5 with similar prices.....at least this is my opinion
We all want that. Unfortunately, X3D manufacturing cost is still too high and slower (so less volume) for AMD to commit to it exclusively.
 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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We all want that. Unfortunately, X3D manufacturing cost is still too high and slower (so less volume) for AMD to commit to it exclusively.
If Zen 5 is as fast as we expect, it will win he gaming crown over 14900k even without x3d. And for desktop, there is no other real use.
 

aigomorla

CPU, Cases&Cooling Mod PC Gaming Mod Elite Member
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Again we will not tolerate personal attacks of any kind. If your doing a friendly jab at sarcasm, then make it obvious to both you and the party that its a sarcasm. If you disagree with the poster and can't stay civil, then ignore them and move on, otherwise it goes it always ends up with one of us moderators having to lock the thread and doing clean up.

Moderator Aigo
 

Geddagod

Golden Member
Dec 28, 2021
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To be honest I'm sort of baffled of how people here treated mlid like he's an anti-christ.
He is annoying AF who is way too arrogant for how bad he is leaking stuff.
He definitely has good infos
He prob does have some actual sources, but he guesses or makes stuff up the other half the time.
and people who are into tech news watch him religiously.
It makes good entertainment, good leaks or not.
Right after a new video is posted, a member linked that here almost instantly.
Well, I'm chronically online so....
 

Geddagod

Golden Member
Dec 28, 2021
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View attachment 86593

Geekerwan has posted Youtube video reviewing 2 x Bergamo 128c, what caught me is above slide showing the optimisation of BIOS which could speed up the performance of system. I may not familiar with above but at least from discussions with adroc and other member, I have an idea what to expect
I swear to god chinese reviewers are infinitely better than the US based ones lol. I watched a Jarrods Tech video where he talks about why he doesn't do CPU perf/watt testing anymore, and his answer was "idk how useful it will be" : |
 

soresu

Platinum Member
Dec 19, 2014
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I swear to god chinese reviewers are infinitely better than the US based ones lol. I watched a Jarrods Tech video where he talks about why he doesn't do CPU perf/watt testing anymore, and his answer was "idk how useful it will be" : |
I suspect the reason falls squarely under being bought by the highest bidder that is currently not doing so well on the perf/watt front.
 

Thunder 57

Platinum Member
Aug 19, 2007
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The numbper 32% IPC increase is oddly specific. It wouldn't surprise me if AMD was looking for a leak and gave out different numbers to see where it lead. Any leaker worth a crap would've protected their source and said something like "30-35%". I don't know what to believe, but I sure as heck don't believe him. If I am wrong I will gladly admit it when the time comes.
 
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H433x0n

Senior member
Mar 15, 2023
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The numbper 32% IPC increase is oddly specific. It wouldn't surprise me if AMD was looking for a leak and gave out different numbers to see where it lead. Any leaker worth a crap would've protected their source and said something like "30-35%". I don't know what to believe, but I sure as heck don't believe him. If I am wrong I will gladly admit it when the time comes.
I don’t think adroc is a “leaker” in the traditional sense. He’s not running a YouTube channel or a twitter account for notoriety. He probably knows people in the industry and is a tech nerd like the rest of us.

I personally trust the technical specs and roadmap info he provides and remain skeptical about the performance projections.
 
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Geddagod

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Dec 28, 2021
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Leak it ! xD
Lol I don't have any actual numbers, I'm not an insider in any way. I hope I have made that clear to the regulars of this forum.
My guess is more based of @adroc_thurston's own statements here, and also would explain why so many people (bionic, exist50) are so skeptical about said IPC numbers.
He previously said that Turin Dense gained 10% perf from SMT. The perf gain between the "C" cores and the regular cores for SMT on vs off should be similar (not the same due to cache + mem differences)

If Turin in server with SMT on gained, 15% IPC vs Genoa, which appear to be based on actual test numbers... (MLID leak)
relative perf iso clock:
Zen 4 SMT off: 1
Zen 4 SMT on: 1.26
Zen 5 SMT off: x
Zen 5 SMT on: 1.45 (1.26 x 1.15)

some simple math:
1.45 = 1.1x
x= 1.32

You get an IPC uplift that's pretty close to Ardroc's self cited 32% claim.
Mind you, if you turn on SMT, the perf uplift isn't necessarily the IPC uplift since clock frequency is likely to regress a bit. So using "turning on SMT in Turin Dense" perf gain isn't the most foolproof method to extrapolate IPC increase for 1T.

I am curious to know if he actually saw Turin 1T specint results, or just extrapolated it based of other benches. I'm guessing the latter.
However the base idea that 1T IPC might be even noticeably higher than the SMT IPC uplift isn't too shocking, wider cores tend to have less of an IPC gain by turning on SMT. Infact, I think that's prob one of the main reasons LNC doesn't have SMT at all...
 
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JoeRambo

Golden Member
Jun 13, 2013
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what caught me is above slide showing the optimisation of BIOS which could speed up the performance of system.

That's not new. I am not sure exactly what setting is helping fluid sims in Ansys Fluent, but it could be as simple as SMT=off doing the job.
Mitigations=off is pretty much standard in "compute" environments.
NPS=4 + NUMA balancing=off is also done quite some times => What it does is split chip in quadrants, each being additional NUMA node, in case of 128C Bergamo the node is out of 2x16C CCDs ( each from 8C CCX ) so it does not provide anything on "per core" commununication level, but it could help with containing memory traffic to IOD quadrant with "dedicated" MCs => at obviuos "extra" NUMA costs and risks.

I still think the impact is 99% from SMT. Fluid stuff is FP, mostly memory subsystem bound and additional threads fighting for that 16MB cache and limited IOD resources probably hurt performance.
Impossible to know without setting dissection.

But yeah, Chinese reviewers rock, western marketing parrots and social media clowns are at the end of the road.
 

DisEnchantment

Golden Member
Mar 3, 2017
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"I just wanted to close my eyes, go to sleep, and then wake up and buy this thing. I want to be in the future, this thing is awesome and it's going be so great - I can't wait for it." - Mike Clark
I wonder if he would want to wake up if he realize he will get single digit percentage gains . [15% IPC gain + supposed 5 % clock regression = paltry 9% perf gain.]

Besides that, core uarch update seems really interesting. Biggest update since Zen 1 for sure.
I would have like to see more updates on the SoC architecture but looks like another long wait.

16M SLC on 8C Strix Zen 5c with 8WGP RDNA3+ would have been great for a lot of these Windows handhelds otherwise.

Strix seems to be getting a huge bump on AIE tiles and +33% CUs.


Curious whether they will put SLC/MALL all around for Zen 6. I have seen several MALL prefetch patents.
 
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SpudLobby

Senior member
May 18, 2022
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And if TSMC isn't going to produce any N3B wafers once N3E comes online, then Intel would have to port their design. Which wouldn't be much of an issue, if this change in plans was done far enough ahead of time.
That’s not how this works though . They’ll run them in parallel, because they are entirely different processes RE: PDK’s and design rules. Good god, look at FinFlEX alone.
 
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SpudLobby

Senior member
May 18, 2022
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Why is it fine for Apple to switch to N3E in the middle of the A17's run but you seem to believe that's unthinkable for Intel?

What’s the direction of Intel’s hiring looking like? Layoffs? And as for Intel, they don’t have the volume to amortize a new tapeout on e.g. ARL and LNL. It’s unlikely to make any sense nor do they have the resources. Apple has even done dual-sourcing in years past, they’re all over the place.
So yeah Intel will not in fact do that.
If A17 is going to be on N3E as soon as that process is available, I still think it is quite likely Apple does not produce any N3B M3s and they are all N3E - to avoid the cost of having two versions of that design.

If there are no M3 Macs announced next month I think it is pretty safe to say we won't see them until next spring and if so we will know for sure they are N3E.

We will see about Intel. They may have decided to wait for N3E to avoid dealing with the issues of N3B. Apple was willing to do so because they needed the density for A17, but we've all seen the rumors that it will switch to N3E next year.
That we’ll see about, RE: M3. If there is a chip they’d delay to port and tapeout on N3E and avoid N3B outright it’s certainly the M series as opposed to the A series, I do agree there. Lots of ways it could go though.
 
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