No. Yonah was the stopgap between Dothan and Conroe. Conroe still had the memory controller on the chipset. Intel did not feature an IMC until Nehalem.Was Yonah the transition to on die memory controller?
No. Yonah was the stopgap between Dothan and Conroe. Conroe still had the memory controller on the chipset. Intel did not feature an IMC until Nehalem.
edit: oops you edited your post.
Ehhh they lost a significant chunk of server to Woodcrest-onwards.At least in the server market.
Does anyone really trust MLID that much?Idk what numbers RGT "spilled", but I thought Zen 5 IPC has long been known from the slide posted by mlid, i.e.10-15%. Why all this guesswork? )
Cuz that makes zero sense at all , so you think amd **** the bed? Zen1-4 are all fundamentally the same sized core. Zen5 is Big front end , big backend , big l1d and you think they get basically the worst perf increase of all zens.Idk what numbers RGT "spilled", but I thought Zen 5 IPC has long been known from the slide posted by mlid, i.e.10-15%. Why all this guesswork? )
Does anyone really trust MLID that much?
Yep. When AMD makes slides like that, they also put footnotes or end notes. These should be read and their implications understood. Sounds obvious, but it seems as if there are always a few people who skip this part.Even if the slide is legit with how AMD announced Zen4 we have no clue what context needs to be applied to that number.
You talk about performance and I talk about IPC.What are you talking about, it was above Broadwell, let alone Haswell, you should look at hold reviews rather than relying on random internet urban legends.
Why not Pentium II or PRO? A development of Pentium III is Banias (Pentium M), then Dothan (Pentium M (2nd gen.) and Yonah (Core M). Each of these developments introduced some changes in the microarchitecture and new solutions. It is true that Dothan is mainly a larger L2 , but Yonah is a development of Banias x86. Conroe(Core 2) is a completely rebuilt and expanded Yonah with changes and logical expansion at the SunnyCove-GoldenCove level. Conroe(Core 2) is seen as a successor to Netbrust(Pentium 4) only on the desktop level.I think you may have followed it up in a subsequent post, but IIRC Conroe was a revamp of the PIII mobile architecture, Netburst burst it's own bubble, see Prescott. Last good Netburst was Northwood, or P4c IIRC.
The IPC growth curve is always based on the entire spectrum of different types of loads/calculations, which usually starts from a few to several dozen %. Manufacturers provide an average of the IPC growth curve.You forgot situation 3: For some reason Zen 5's IPC increase (whatever it may be) is extremely variable by workload so people never stop arguing how much IPC increase there really was
Northwood was the only proper and acceptable netburst. Willamette was utter shame and Prescott what happens when you take something good (Northwood) and screw it big time.I think you may have followed it up in a subsequent post, but IIRC Conroe was a revamp of the PIII mobile architecture, Netburst burst it's own bubble, see Prescott. Last good Netburst was Northwood, or P4c IIRC.
Conroe had a clock regression and IPC uplift. I purchased a Kentwood. Quad. But Nvidia chipset was garbage for it so.. ala Striker Extreme.
Was Yonah the transition to on die memory controller?
I did the work, here you go.
Products formerly Kentsfield
Products formerly Kentsfield product listing with links to detailed product features and specifications.ark.intel.comProducts formerly Yonah
Products formerly Yonah product listing with links to detailed product features and specifications.ark.intel.comSo they still had FSB into Penryn.Products formerly Conroe
Products formerly Conroe product listing with links to detailed product features and specifications.ark.intel.com
Nehalem brought the IMC https://en.wikipedia.org/wiki/Nehalem_(microarchitecture)
Conroe/Merom wasn't a mere expansion like Sunny/Golden. It introduced never used features such as macro op fusion and memory disambiguation.So the massive growth of IPC Conroe was no miracle compared to Netbrust. Compared to IPC Yonah, it was simply the generational leap that could be expected from the next generation.
Micro-ops fusion was first used in Pentium M(Banias):
Intel introduced macro-ops fusion in Conroe, a feature where two coupled x86 instructions could be “fused” and treated as one. They would decode, execute and retire as a single instruction instead of two, effectively widening the hardware in certain situations.
Honestly I find it hilarious if anybody who followed Zen development would be let down by this. Following AMD's development patterns it was known well before that Zen 4 would likely be "a mild Zen 3 evolution", because that's what it essentially was, just like Zen 2.The Zen 4 letdown is based on the IPC jump expectations set by the Zen 2->3 transition - 19% IPC on the same process, TDP kept, launched just 16 months apart. Keep in mind the 25% IPC figure was floating around until the Gigabyte leak.
Zen 4 is not bad, but from engineering PoV it feels like a mild Zen 3 evolution + TDP + frequency investment. The product works well but the hype train hyped a different product.
You talk about performance and I talk about IPC.
Oh but they had a lot of these.What I found slightly disappointing was the lack of package/IOD changes
Im talking of IPC as well.
I provided a link where you can compare HW and Zen, frequencies are comparable for the 4C/8T CPUs, 2400G is 9% faster than the 4770K, and i dont think that it hit higher clocks in MT, the latter is only 18% faster than the SMT less 4C/4T 2200G.
[Sammelthread] - IPC getestet - Ryzen, Haswell-E und co.
https://abload.de/img/35006cores9ss6q.pnghttps://www.hardwareluxx.de/community/attachments/f11/430264d1521931460-ipc-getestet-ryzen-haswell-e-und-co-broadwell_e.jpghttps://img1.picload.org/image/daicpwwa/ryzen_ipc.jpgDies ist ein Benchmarkthread in dem es um die IPC (Instructions per cycle) von...www.hardwareluxx.de
And on desktop?Oh but they had a lot of these.
Genoa sIOD topology is something out of Hellraiser.
You mean they planned something new but decided to stay on the previous solution for reasons like costs, capacity, etc.?Oh but they had a lot of these.
Genoa sIOD topology is something out of Hellraiser.