That's just a scheduling problem, and a more difficult one for the 7950X3D than for a theoretical hybrid chip at that. Having two CCDs which are both best at ST, just under different workload conditions, is much harder to deal with than knowing that one will always be faster. We see that in practice games never just get pinned to the E-cores on Intel hybrid chip, so I think Windows scheduling is already where it needs to be in that regard.Only it isn't just the game being statically bound to the wrong CCD, it can also be the OS allowing threads to wander between CCDs.
As mentioned, shouldn't be any worse than what we see today. If the OS allows a thread to wander, it would presumably be a perf-insensitive one. The hit from the other CCD seems to be more about the cross-CCD latency than clock speed. Might get a one or two games that need patching, but I doubt it'd be anything significant.If even a few threads wander to a high-density, low-clock CCD on a Zen5 desktop chip then performance could crater.
Yes, the top SKU usually puts out the top gaming numbers, but the difference is almost entirely clock speed, which can be normalized by overclocking, or AMD just making different SKU decisions. Either way, the gap is negligible vs a single CCD 8c chip. If you have a 4090 and money to burn, sure, go for it, but for your average gamer, even enthusiast, grab the 8c X3D and you'll never have to worry about it. Though I am assuming that AMD fixes the v-cache frequency penalty sooner or later.Traditionally they have been in the x86 market.
Is that not the current reality anyway? The 8c CCD boundary is a very similar problem to Intel's 8 P-core limitation. Long term, I'm sure game devs will find ways to use all that compute sitting idle. And when you think about it, density vs peak performance might be an appealing tradeoff for consoles...If AMD joins Intel in the box of "8c is enough" and instead encourages the proliferation of many slow cores in one form or another, then it's going to discourage a certain amount of innovation in that regard.
Since AMD has no hybrid chips, you must be talking about Intel. And with Bergamo, they have made it clear that they will NOT be going with a hybrid approach.There is nothing Intel-specific about what I wrote. I've shown you benchmarks before, and will not waste the time to repeat myself. Productivity apps make good use of hybrid, and there's no reason to believe that would not apply to an AMD hybrid offering.
But clearly you just wanted an excuse to go on your typical rant. I'd be shocked if you could go a single comment without mentioning your obsessive hatred of Intel.
They have not. And with Bergamo, they have made it clear that they will NOT be going with a hybrid approach.
lolAs far as my "hatred of Intel", thats not true.
AMD did, in fact, say that Bergamo was server only. They also did say they would not be taking the same approach as Intel. Neither of those statements rules out a hybrid approach, but the few serious rumors I have seen thus far indicate AMD is sticking with 8-16 cores on the desktop. They are even reusing the naming scheme.They have not
No one here is contesting that?AMD did, in fact, say that Bergamo was server only.
Yes.They also did say they would not be taking the same approach as Intel.
So what @Markfw said was false, and was exactly what I disagreed with. Nothing about Bergamo has shown that AMD is not going with a hybrid approach, does Intel's Sierra Forest prove that Intel isn't going with a hybrid approach with Arrow Lake then?Neither of those statements rules out a hybrid approach,
Why wait for Zen 5? Apparently Zen 4 mobile will have Zen 4C cores as well.Mobile? Potentially a different story. Mobile could very well be a monolithic hybrid design. 4-8 high frequency cores, 8-16 lower clocking small cores.
That igor leak for ARL makes it look like Zen 5 will be a good a 10-20% faster in ST and MTArrow Lake will be a huge step up for Intel in terms of perf/watt and will be an okay perf uplift, but Zen 5 will be faster thanks to a healthy IPC improvement.
All I said was "lol"Regarding your comments about @Markfw , uncalled for.
There's a difference between pessimism and outright fanboying, and I suspect many of here on Anandtech noticed Markfw cross that line... numerous times- in a repetitive fashion that has become recognizable as a pattern.Finally, sometimes folks here are super pessimistic about Intel’s ability to execute because they have over promised and under- delivered so many times. There is nothing wrong with that. Results are proven with actions, not words.
There's a difference between pessimism and outright fanboying, and I suspect many of here on Anandtech noticed Markfw cross that line... numerous times- in a repetitive fashion that has become recognizable as a pattern.
But, in respect to both Markfw and Anandtech's rules (as I very recently got a ban hammer for a day for cussing lol) I won't talk about his antics beyond this response for a bit.
How did you manage to bring Intel's outdated turbo tables into a Zen thread? The only frequency hardcoded in today's Zen chips should be the upper limit, everything else depends on cooling headroom.That's a decision made by AMD when establishing clockspeed and power targets for each CCD under specific utilization scenarios.
Is that not the current reality anyway? The 8c CCD boundary is a very similar problem to Intel's 8 P-core limitation. Long term, I'm sure game devs will find ways to use all that compute sitting idle. And when you think about it, density vs peak performance might be an appealing tradeoff for consoles...
How did you manage to bring Intel's outdated turbo tables into a Zen thread?
The only frequency hardcoded in today's Zen chips should be the upper limit, everything else depends on cooling headroom.
I think we are talking about different thing. The part you are talking about is essentially binning, of course different cores and different CCDs have different qualities. Of course they are set accordingly, you don't want processes to end up on weak cores or the weak CCD if better cores/CCD are available.Based on what we know from messing with PBO + Curve Optimizer, AMD has the capability to set whatever power/clockspeed target they want on a per-core or per-CCD basis. There's a lot of room for fine-grain control here. If AMD wanted to keep CCD0's clockspeed target high(er) when utilizing CCD1 then they could probably do so, at the cost of clocks on CCD1. Out-of-the-box they don't do so, and they still haven't offered a "gamer" mode where they attempt such behavior (instead, they let you just disable the second CCD). Again there's no free lunch, but they certainly have the controls available to shift power budget towards CCD0. Of course taking that behavior too far could lead to the same things I'm speculating could happen on future Zen5 products with a dense CCD: CCD1's clocks could become low enough that moving threads there would tank overall performance. In which case AMD might be better off raising power budget a bit for gaming workloads, but only for CCD0. As it stands, most 2 CCD Zen CPUs do not reach their full power budget when running games.
Nothing about Bergamo has shown that AMD is not going with a hybrid approach
AMD themselves call it hybrid, which I think is sufficient by itself. The scheduler doesn't care about the underlying RTL or physical design. Different means to the same end.Let's say they put Zen4 and Zen4c in an APU. Would it really be hybrid?
There are many benchmarks for games that run a lot better with E-cores off, WoW being a very prominent example. Frankly I've seen nothing good to be said by either vendor about their relationship with windows thread scheduling. I am not sure why you keep posting this rhetoric that there is some AMD scheduling problem when it literally crops up in Intel chips all the time too.We see that in practice games never just get pinned to the E-cores on Intel hybrid chip, so I think Windows scheduling is already where it needs to be in that regard.
That is certainly not what Raptor Lake benchmarks show.There are many benchmarks for games that run a lot better with E-cores off
Huh? I was explaining why hybrid would not be an issue for gaming, if AMD decides to go that direction. I think 8+16 would be the natural evolution for AMD's halo product.I am not sure why you keep posting this rhetoric that there is some AMD scheduling problem when it literally crops up in Intel chips all the time too.
AMD does indeed put limits into their silicon (and AGESA). This was discussed elsewhere and I believe AMD also mentioned this during a video once. FMAX is only one of those limits.How did you manage to bring Intel's outdated turbo tables into a Zen thread? The only frequency hardcoded in today's Zen chips should be the upper limit, everything else depends on cooling headroom.
I think it's mostly a PR term at this point, filled with different meanings by different manufacturers. AMD is being pushed to have a "hybrid" solution of its own after Intel's push for "marketing cores" is widely seen as successful at ensuring Intel's competitiveness in desktop. Intel's E-cores are mainly good for being area efficient, and so are AMD's dense cores.where does hybrid start?
That's more under the umbrella of what they used to call "Fusion". I think if AMD talks about hybrid in marketing, they will either use the term for the mix of CPU cores, or just invent a new term altogether. Well, that would at least be the sane way to brand things. We'll see what their marketing department thinks...But I'm getting the impression AMD likes to call the inclusion of the AI Engine hybrid as well.
No, Fusion is from a decade ago. I was thinking of Papermaster's interview from May:That's more under the umbrella of what they used to call "Fusion". I think if AMD talks about hybrid in marketing, they will either use the term for the mix of CPU cores, or just invent a new term altogether. Well, that would at least be the sane way to brand things. We'll see what their marketing department thinks...
There is no big.LITTLE alike product on the market by AMD right now. (Big) Phoenix with its AI Engine however is already available. While Little Phoenix with its supposed mix of cores is MIA (and people like Ian Cutress talk like it doesn't exist/isn't mixing cores). Or what do you think Papermaster is referring to?
I think it's useful to include the context:No, Fusion is from a decade ago. I was thinking of Papermaster's interview from May:
"Paul Alcorn: So, it's probably safe to say that a hybrid architecture will be coming to client [consumer PCs]?
Mark Papermaster: Absolutely. It's already there today, and you'll see more coming."
AMD to Make Hybrid CPUs, Also Using AI for Chip Design: CTO Papermaster at ITF World
More cores, with a new twist.www.tomshardware.com
There is no big.LITTLE alike product on the market by AMD right now. (Big) Phoenix with its AI Engine however is already available. While Little Phoenix with its supposed mix of cores is MIA (and people like Ian Cutress talk like it doesn't exist/isn't mixing cores). Or what do you think Papermaster is referring to?
So it's tough to say what he means in particular, but he is lumping in V-cache SKUs under the "hybrid" umbrella, so maybe that's the intended reference?But what you'll also see is more variations of the cores themselves, you'll see high-performance cores mixed with power-efficient cores mixed with acceleration. So where, Paul, we're moving to now is not just variations in core density, but variations in the type of core, and how you configure the cores. It's not only how you've optimized for either performance or energy efficiency, but stacked cache for applications that can take advantage of it, and accelerators that you put around it.
When you go to the data center, you're also going to see a variation. Certain workloads move more slowly [...] You might be in that sweet spot of 16 to 32 cores on a server. But many businesses are indeed adding point AI applications and analytics. As AI moves from not only being in the cloud, where the heavy training and large language model inferencing will continue, but you're going to see AI applications in the edge. And it's going to be in enterprise data centers as well. They're also going to need different core counts and accelerators.
Paul Alcorn: So, it's probably safe to say that a hybrid architecture will be coming to client [consumer PCs]?
Mark Papermaster: Absolutely. It's already there today, and you'll see more coming.
That is certainly not what Raptor Lake benchmarks show.
But the average is 1%, and at 1080p with a 4090. Higher resolution and ray tracing would all be likely to flip that gap. Either way, I don't think that's a meaningful difference. Plus, most of the penalty is likely to be the still extant (albeit smaller) hit to ring clock speeds, which AMD would not have a problem with in a two CCD hybrid approach.9 games having a significant preference for E cores disabled certainly isn't nothing
Well yeah, games in general make terrible use of modern high end chips. That's what I was saying earlier about the second CCD for the 7950x being useless for gaming. If you have the game pinned to one CCD, as it typical right now, whatever you do to the other is unlikely to matter. That's why I think it's much more sensible to talk about the productivity benefit of a hybrid setup.it would seem E cores are seriously under-utilized in gaming
For both Intel and AMD, gaming workloads simply do not push the processors' power limits. For example, ComputerBase measured 141W for the 13900k, 105W for the 7950X, and 72W for the 7950X3D. All well below their respective boost power limits. Thermal density (cooling) and silicon limitations are more likely to limit gaming performance than power.Surely turning off 16 extra cores would net more headroom for the P cores to clock a bit higher.
Zen 4C uses the same node as Zen 4 IIRC so it shouldn't be a problemCan the "c" and regular cores be made on a monolithic silicon or do they require two different pieces of silicon?