There are 6 Zen4 cores being shrinked to 4 Zen4C while use 4CUs GPU instead of 12CUs, only result in ~23% smaller die size??? If true what's the point of this design? I think even 6 OG Zen4 and 4CUs can do 137mm2. Something is not right.....(But this is Zen5 thread, so....)Here is your answer for hybrid:
AMD confirms Ryzen 3 7440U features 6-core Phoenix2 APU with Zen4 hybrid design - VideoCardz.com
The smaller AMD Phoenix APU features hybrid architecture Ryzen 7540U and 7440U have a combination of Zen4 and Zen4c cores. AMD Phoenix2 APU, Source: Golden Pig Upgrade In a recent exchange with XDA-Developers, AMD has officially acknowledged that the AMD Phoenix APU used in the Ryzen 3 7440U...videocardz.com
If this is true, looks like it is launching on the mid-low end.
AMD managed to get the die size down to 137mm2. I am curious as to how they are doing this. Multi-die or mixing HP/HD libs on one die? Hopefully we get details soon.
Side Note: Would love to see them add (“small”) cores to the IO die for Zen 5. That would be one way to add cores without having to make multiple types of chiplets.
That would add a lot of costs and would decrease flexibility as well...for maybe a little bit more performance. Not wise at all, AMD will never do that.Can the "c" and regular cores be made on a monolithic silicon or do they require two different pieces of silicon?
Here is your answer for hybrid:
AMD confirms Ryzen 3 7440U features 6-core Phoenix2 APU with Zen4 hybrid design - VideoCardz.com
The smaller AMD Phoenix APU features hybrid architecture Ryzen 7540U and 7440U have a combination of Zen4 and Zen4c cores. AMD Phoenix2 APU, Source: Golden Pig Upgrade In a recent exchange with XDA-Developers, AMD has officially acknowledged that the AMD Phoenix APU used in the Ryzen 3 7440U...videocardz.com
If this is true, looks like it is launching on the mid-low end.
AMD managed to get the die size down to 137mm2. I am curious as to how they are doing this. Multi-die or mixing HP/HD libs on one die? Hopefully we get details soon.
Side Note: Would love to see them add (“small”) cores to the IO die for Zen 5. That would be one way to add cores without having to make multiple types of chiplets.
All this doesnt make much sense on a cost perspective, if they do a 2 Zen 4 + 4 Zen 4c then they cant harvest efficently chips that have a non functional Zen 4 core and would be left with 4 Zen 4c cores, and if one Zen 4c is non functional that would get them a 2 + 2.
If that s 4 Zen 4 + 2 Zen 4c instead then a faulty Zen 4 core would lead to a 2 + 2, while a faulty Zen 4c would yield a 4 + 0.
Most logical would be to use 6 regular Zen 4 cores to get rid of those complicated and innefficient arrangements, the fact that the die is only 23% smaller despite a drastically cut down GPU and no AI is a hint that there s no c cores here.
They can harvest everything for the very low-end embedded stuff they sell. Things like POS terminals and machines that display ad screens are something AMD still sells a bunch of, even if the margins are so low it's barely visible in their bottom line. Anything that has a display out and at least one working x86 core has a place where it can be sold, even if the prices are not very interesting for AMD.
There are 6 Zen4 cores being shrinked to 4 Zen4C while use 4CUs GPU instead of 12CUs, only result in ~23% smaller die size??? If true what's the point of this design? I think even 6 OG Zen4 and 4CUs can do 137mm2. Something is not right.....(But this is Zen5 thread, so....)
Small phoenix has same L3 cache (16MB), same Media engine, Same USB/Sata controllers, Same 128bit DDR5 memory PHY, Same Display controllers. That's why it hasn't shrunk a lot.
It's hard to shave off silicon area. You have to sacrifice a lot to get an even smaller die size. For example, "Zen 2" Renoir is 158mm², and to get to 100mm² (mendocino), they've cut out: 20 out of 24 pcie lanes; 6 out of 8 compute units; bunch of usb; all sata; half the memory bus; half the cores; half the cache.
Zen 4c is in there for lower power use, mostly.
I think you missed: They've cut out 6 out of 8, leaving only 2. And they've cut out L2 iGPU cache in mendocino too. I've edited my comment to make it more obviousFrom 6 to 8CUs is by far not as much as 12 to 4 CUs, and yet Mendocino was die reduced by a 1.5 factor while PHX to PHX2 is only reduced by 1.3 factor, granted the core count is reduced by only 1.33x but cores are tiny compared to the GPU part wich should be allocated about 40-50% in PHX.
Regarding your comments about @Markfw , uncalled for. IMO. Many of us are pretty neutral about who makes our hardware, as long as it performs great. Intel is significantly trailing AMD in perf/watt and so many of us won’t use them because of that.
So what @Markfw said was false, and was exactly what I disagreed with.
What about the possibility of "shadow" cores that aren't OS transparent but are present on the I/O die? I think Meteor Lake has 2 low power cores on the SOC die that aren't OS transparent?Here is your answer for hybrid:
AMD confirms Ryzen 3 7440U features 6-core Phoenix2 APU with Zen4 hybrid design - VideoCardz.com
The smaller AMD Phoenix APU features hybrid architecture Ryzen 7540U and 7440U have a combination of Zen4 and Zen4c cores. AMD Phoenix2 APU, Source: Golden Pig Upgrade In a recent exchange with XDA-Developers, AMD has officially acknowledged that the AMD Phoenix APU used in the Ryzen 3 7440U...videocardz.com
If this is true, looks like it is launching on the mid-low end.
AMD managed to get the die size down to 137mm2. I am curious as to how they are doing this. Multi-die or mixing HP/HD libs on one die? Hopefully we get details soon.
Side Note: Would love to see them add (“small”) cores to the IO die for Zen 5. That would be one way to add cores without having to make multiple types of chiplets.
I don't think "OS transparent" cores are a thing. At least not when talking about application processors. Applies the same for AMD and Intel.What about the possibility of "shadow" cores that aren't OS transparent but are present on the I/O die? I think Meteor Lake has 2 low power cores on the SOC die that aren't OS transparent?
Well see when there s something actually released, FTR the 6C/4C clock at 4.9/4.7GHz respectively, that s quite high frequencies typical of a regular Zen 4 since they are also 28W TDP limited, quite unlikely that for the 4C version they would go as far as using a single Zen 4 core and 3 Zen 4c cores if they are to recycle partly faulty parts.I think you missed: They've cut out 6 out of 8, leaving only 2. And they've cut out L2 iGPU cache in mendocino too. I've edited my comment to make it more obvious
Doesn't matter does it? People complain about Intel's Thread Director and how the IOD handles cores on AMD but the real problem here is Microsoft and how their thread handling works// regardless of how much damn handholding microsoft is given by these two companies m$ still walks into a wall, consistently and without fail.I don't think "OS transparent" cores are a thing. At least not when talking about application processors. Applies the same for AMD and Intel.
I know what you mean, but I don't think it's possible to have cores invisible to the OS like that. Or at least not practical. It's almost certainly not how MTL does it, at any rate.Sorry, maybe I'm using the wrong terminology. I just mean cores present on the I/O die that Windows can't access directly but are present for background tasks (I can't define that right now). I'm pretty sure there was discussion about cores on the Intel Meteor lake SOC die. What are the chances AMD does something like that?
Et tu, Videocardz?Here is your answer for hybrid:
AMD confirms Ryzen 3 7440U features 6-core Phoenix2 APU with Zen4 hybrid design - VideoCardz.com
The smaller AMD Phoenix APU features hybrid architecture Ryzen 7540U and 7440U have a combination of Zen4 and Zen4c cores. AMD Phoenix2 APU, Source: Golden Pig Upgrade In a recent exchange with XDA-Developers, AMD has officially acknowledged that the AMD Phoenix APU used in the Ryzen 3 7440U...videocardz.com
AMD confirms Ryzen 3 7440U features 6-core Phoenix2 APU with Zen4 hybrid design
While AMD stopped short of confirming that the underlying design used a hybrid architecture, the details line up so perfectly with the rumor that it's all but certain.
What about the possibility of "shadow" cores that aren't OS transparent but are present on the I/O die? I think Meteor Lake has 2 low power cores on the SOC die that aren't OS transparent?
The cores can be hidden from the OS pretty easily. The thing is that you don’t want to do this. You WANT Windows/Linux to see a normal core. Ideally, you would provide an instruction for an OS to call that describes the topology of the system and let the OS figure out scheduling. Things like core grouping (for shared caches, thread grouping, etc), speed relative to other cores, latency, power limits, etc. would ideally all be provided. However, this is not the case currently. You can sniff out a lot of this stuff using other methods, but they can be error prone.It's possible, most SoC have cores that are not "visible" to the OS for special stuff, for example Zen SoC has an ARM Cortex for their security stuff (AMD Secure Processor). Those cores also run their own OS/Kernel.
For Meteor Lake, that's more complicated as those cores are "exposed" to the OS, but maybe a future Windows version will support DPU-like usage of "special cores".
The problem with the high core count products for desktop is that after you ran Cinebench and got the score, their useful life has ended.I too would like to see AMD offer 8P + 16D at the same time as 8P + 8P, so that we can finally see for ourselves what part of the desktop consumer market is willing to buy dense cores over performance cores.
That is just totally wrong. There are people that don't want a full-on workstation (or can't afford it) or people that really can use more than 8 cores, for encoding and such. 8 cores is only really for gamers, or light use desktop purposes.The problem with the high core count products for desktop is that after you ran Cinebench and got the score, their useful life has ended.
For the rest of the life of the PC, all it needs is ~8 cores.
Would you say this is 98% of unit sales? Or maybe 99% of the desktop unit market?8 cores is only really for gamers, or light use desktop purposes.
I am not sure I have enough data for a great guess, but I would guess in the 70-80 % range could get by with 8.Would you say this is 98% of unit sales? Or maybe 99% of the desktop unit market?
My understanding is that for Zen 1-4 this has been a single core ARM Cortex A5. Any chance they move to RISC-V for Zen 5 or a different ARM core?It's possible, most SoC have cores that are not "visible" to the OS for special stuff, for example Zen SoC has an ARM Cortex for their security stuff (AMD Secure Processor). Those cores also run their own OS/Kernel.
For Meteor Lake, that's more complicated as those cores are "exposed" to the OS, but maybe a future Windows version will support DPU-like usage of "special cores".