Gigachad desktop users vs virgin server users lolEhhhhhh not in server
This is sounding a lot like "looking at multiple generations of chips for patterns to predict future generations" and not a whole lot of "look at my 7950x going zoom"Zen 1 was released in 2017, and there has been 5 gen of zen since, and every performance uplift has been increasing since the last.
Reminds me a lot of Kellers statement about the future of Intel's archs after SNC. Or the chief architect of GLC hyping up Intel's future cores after RPL. Breaking news! Companies chief architects hyping up future products?Even if you ignore all that, Mike's comment about zen 5 should at least be something to be addressed.
I literally just explained how false that was in my previous comment. Addressed multiple times already my buttThere were also rumors about the excitement behind the scene about zen 5, this has been addressed multiple times already.
Um Akshually, 13900k uses a new core, new die, and is a pretty good bump over the 12900k.Also, 12900k 13900k 14900k are the same damn thing and it's factually wrong to claim otherwise.
No... no... my 12 SPR WS CPUs and 8 13900k's destroy cinebench btw, obviously this means that EMR is going to be a 690% jump over SPR!The false equivalence in this case is about the rate of which intel and amd churning out performance upgrades with each gen is not the same.
Maybe next time say "source: my foot"So, people are not allowed an opinion unless they can prove it ?
Nah, I don't dip from threads cuz I get bullied by the threads members like some other people ¯\_(ツ)_/¯Go back to your Intel thread.
What a low value and useless comment. But whatever lol. I was just making a joke about your previous comment, not that deepI could be wrong about Zen 5, but my gut tells me its going to be good.
its a very good arguement actually.Bad argument. GLC only got a 15% jump in server lmao. And SNC got 18% IIRC. The difference between 18 to 15% is that much lol. Plus, if you believe in the 15% rumor, I doubt you are as likely to believe in the frequency regression rumor as well, at least not a significant frequency regression. And SNC was a frequency regression over SKL, even RKL's 'SNC' version just tied SKL. Plus, the all core frequency regression was seen in both SNC ICL and CYPRC RKL. Also, GLC was technically a Fmax frequency regression over WLC, and that used a better node than WLC to boot (and the node difference there is prob bigger than the one between N4 and N5 for Zen 5 vs Zen 4).
Two words : diminishing returnsits a very good arguement actually.
lets look at it :
AMD is doing about the same or greater in 1 generations then Intel did in 4!!!!!
how much IPC did intel get from skylake lake to GC in SPEC int. how much did AMD get going from Zen1 to Zen4 , Now do we really think that the same teams that got ~40% IPC from Zen1 to Zen4 while fundamentally keeping the same width / size core ( bones as Jim. K calls them ) will only get 15% IPC with such big resource increases ignoring all the other general improvements to prefetch / predict / etc ?
View attachment 87062
I am willing to take BETS!
Gigachad desktop users vs virgin server users lol
This is sounding a lot like "looking at multiple generations of chips for patterns to predict future generations" and not a whole lot of "look at my 7950x going zoom"
Reminds me a lot of Kellers statement about the future of Intel's archs after SNC. Or the chief architect of GLC hyping up Intel's future cores after RPL. Breaking news! Companies chief architects hyping up future products?
I literally just explained how false that was in my previous comment. Addressed multiple times already my butt
Um Akshually, 13900k uses a new core, new die, and is a pretty good bump over the 12900k.
I love how confident you are about this tho lol. Factually wrong lmaooo
No... no... my 12 SPR WS CPUs and 8 13900k's destroy cinebench btw, obviously this means that EMR is going to be a 690% jump over SPR!
Maybe next time say "source: my foot"
It's fine if you don't have proof lol, just don't pretend like you do
Nah, I don't dip from threads cuz I get bullied by the threads members like some other people ¯\_(ツ)_/¯
What a low value and useless comment. But whatever lol. I was just making a joke about your previous comment, not that deep
I'm awaiting my ban, mod team
Not saying I don't think a massive IPC increase is impossible... but there's plenty of reasons for people to remain skeptical.
To which I completely agree. However, as mentioned earlier, past actions serve as the most reliable indicators of future ones. Zen was initially conceived with the intention of a highly streamlined, compact, and exceptionally scalable cores. Zen 1, 1+, 2, 3, and 4 are all that. Zen 5 seems to go wide, however, which is a different design philosophy aim toward high efficiency, which is 100% in line with the industry. When complexity and difficulty go way up, the only obvious winning move is to be highly efficient. Intel's approach with sky high clock is obviously the wrong approach, as demonstrated with 3 gens of golden coves. And from what's been leaked so far, arrow lake seems to be doing the opposite of that. Therefore, zen 5 having a massive ipc increase should be possible given of increasingly rapid development of amd's financial and engineering capabilities, and frankly it should be expected as much.Not saying I don't think a massive IPC increase is impossible... but there's plenty of reasons for people to remain skeptical.
I think the best days are ahead of us. Intel trimming the fat is a good sign of a healthy competition. Remember when the limited x86 cores ipc uplift narratives was the norm?I'm fairly certain you won't get banned for having an opinion. Nice try though.
I think the days of a massive IPC increase are over, unless the previous uarch was bad. Say Pentium 4 or Bulldozer bad.
That said, if the rumors about Zen 5 are true, I am still sticking to 22-23% IPC improvement. It will depend on the task, of course. I can't wait to find out more info on Zen 5 and Arrow Lake. Competition is good.
Not saying I don't think a massive IPC increase is impossible... but there's plenty of reasons for people to remain skeptical.
They are willing to pay, because they will use Dragon Range 3D with a TOP dGPU(4080-4090), so that laptop will have a very high price.I think the reference to Dragon Range was that some OEMs are willing to release a product with a pricey CPU.
While, I think, there will still be a nominal Dragon Range successor (put together at minimum cost to AMD), the main effort, and where more money went is Strix Halo, which will likely have the same CPU power (roughly) plus strong GPU.
One word AxxTwo words : diminishing returns
?
And the point there is that, even if the slides are real, they stated 15%+ for IPC, that is, 15% was the minimum increase across several workloads.The IPC AMD announce across a geomeaned set of workloads and specint 1t can also be very different. If they do that again with a similar mix of workloads to the Zen3 announcement I would not be surprised if the stated IPC uplift is more like 20-25%.
When AMD 1st announced Zen4 and had that >5Ghz, >15% ST uplift slide people went off the deep end then when reviews came it was significantly better than that with 5.7Ghz clocks and upto 29% 1t performance improvement.
With Zen AMD have a massive habit of under promising and over delivering so if they are saying 15% IPC in some slides somewhere the reality can have a lot of upswing, especially if the metric is for a specific test or limited suite of tests.
Is that even a word lol, and what?One word Axx
Oh ye because we have so many data points for "available consumer cores"? Only AMD matches Intel in clock speed, and the rest of the "high performance" ARM based cores for client is that new Qcom core which isn't released yet, and Apple.Intel P cores are the outlying uarch when considering available consumer cores.
Spec2017 testing, Firestorm is ~ 25% faster than Zen 4 in Int and FP.Why wouldn't amd hit ~ apple IPC with a ~ apple sized core in terms of resources?
It prob will be.Zen5 could be very big( physical) because they will then spend the die space to keep clocks up as well.
I thought zen4 was 2x256 bit AVX512?
STX Halo is designed to compete with 4070 mobile GPUs - 6700 XT desktop performance level.I dunno, using 3dmark's average TSE scores, the 6800M is about 10% slower than the desktop 6700 XT. And the 6800M has the full memory bandwidth.
That would also be about the 4070M performance.
Arrow Lake mobile CPUs are going to compete with Strix Halo, while not being halo SKU/product.I think it's a bit interesting Intel and AMD both are creating mobile skus that the other company doesn't seem to interested in competing in. ULP LNL for Intel, "mega APU" Strix from AMD.
The only thing that you are missing is Decode width for Zen 5.its a very good arguement actually.
lets look at it :
AMD is doing about the same or greater in 1 generations then Intel did in 4!!!!!
how much IPC did intel get from skylake lake to GC in SPEC int. how much did AMD get going from Zen1 to Zen4 , Now do we really think that the same teams that got ~40% IPC from Zen1 to Zen4 while fundamentally keeping the same width / size core ( bones as Jim. K calls them ) will only get 15% IPC with such big resource increases ignoring all the other general improvements to prefetch / predict / etc ?
View attachment 87062
I am willing to take BETS!
Spec2017 testing, Firestorm is ~ 25% faster than Zen 4 in Int and FP.
But ye, even if Zen 5 has "apple sized core in terms of resources" , Zen 5 might have more pipeline stages than firestorm, or it can have higher latency parts in the core itself. It's easier to design lower cycle latency stuff when your clock speed is lower. An example of that is firestorm having a massive 128KB L1D with 3 cycle latency, while Zen 3 has 1/4 the capacity and still has an extra cycle of latency.
What do you mean?Arrow Lake mobile CPUs are going to compete with Strix Halo, while not being halo SKU/product.
ARL mobile iGPU is 2.5 times larger than MTL.What do you mean?
In what will It compete? CPU or IGP?
You say It like 320EU is already confirmed.ARL mobile iGPU is 2.5 times larger than MTL.
No, only 50% larger EU. GT5/320EU has been cancelledARL mobile iGPU is 2.5 times larger than MTL.
192EU should be pretty good against Strix Point's 16CU IGP. The question is when It will be out.No, only 50% larger EU. GT5/320EU has been cancelled
Spec2017 testing, Firestorm is ~ 25% faster than Zen 4 in Int and FP.
But ye, even if Zen 5 has "apple sized core in terms of resources" , Zen 5 might have more pipeline stages than firestorm, or it can have higher latency parts in the core itself. It's easier to design lower cycle latency stuff when your clock speed is lower. An example of that is firestorm having a massive 128KB L1D with 3 cycle latency, while Zen 3 has 1/4 the capacity and still has an extra cycle of latency. So just bcuz u have giant structures, doesn't mean you get the same IPC. There's way more that goes on in a core's arch than just how big your ROB is or how wide your decoder is. I'm not going to pretend ik everything about it either, but that's why I'm putting skepticism on high IPC claims and am not saying just bcuz Zen 5 might match Firestorm in terms of core resources, it will match it in IPC.
It came from people who can't read/comprehend. I Said same amount of resources which would result in a bigger core then apple Axx to maintain high clock rate.Yes this 100%
I'm not sure where the argument of "spend like Apple does for Apple like IPC figures" comes from, when they have such different targets for clock rate and power draw. And it isn't like spending more money directly translates into better results. See The Mythical Man Month or Brooks' Law - that's about software projects not hardware design but I'm pretty sure it still applies.
Some posts remind me of Zen1 prelaunch discussions, when AMD could not match broadwell/skylake because reasons.It came from people who can't read/comprehend. I Said same amount of resources which would result in a bigger core then apple Axx to maintain high clock rate.
Like by people's logic zen4 should exist because a7x doesn't clock as high with about the same level of resources for the same level of IPC.
Also re pipeline stages , zen4 isn't particularly long , execution latency isn't particularly high and it has a uop cache, store pipeline kind of irrelevant ...
Everyone willing to nay say but no one's willing to take the wager