Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Abwx]

I think for a typical DT user with mixed workloads this is more important:
1. Max ST performance up to a certain amount of cores, e.g. ~8C.

Why not up to 16 threads, that is , 16C..?...

Because intel cant provide more than 8..?.

 

[Fjodor2001]

Nope, that's only ever useful for cinememe.

If that’s the case for you, you should go with 1) only.

 

[itsmydamnation]

Why not up to 16 threads, that is , 16C..?...

Because intel cant provide more than 8..?.

Yeah this guys had this odd agenda for months.

It's like claiming all desktop CPUs that don't have avx512 are irrelevant and worthless.

 

[adroc_thurston]

If that’s the case for you, you should go with 1) only.

I'll go with 3) aka 16 fat cores!

 

[Fjodor2001]

Why not up to 16 threads, that is , 16C..?...

Because intel cant provide more than 8..?.

Could be more than 8C, which is why I wrote ~8C.

But I think at some point, if your targeting max MT perf, max perf/watt, and max core count at lowest price, then using only P cores often does not make sense (although there are exceptions).

Ideally you’d like to have separate SKUs tailored for each individual user’s needs. But that’s not realistic.

That said, I think e.g. both 8P+0E, 8P+16E, 16P+16E, and 8P+24E could make sense on DT. The question is how many SKUs are realistic to provide. But I think at least some mix of P and E cores would be good. Basically all other CPU manufacturers than AMD already provide that, both on mobile and desktop. I guess they’re doing it for some reasons.

 

[Fjodor2001]

I'll go with 3) aka 16 fat cores!

If you want more P cores, then why don’t you buy an EPYC CPU. Or are you too poor for that?

 

[Markfw]

If you want more P cores, then why don’t you buy an EPYC CPU. Or are you too poor for that?

I think Stefan was talking about 32-128 fat cores with avx-512 for DT performance, but not speaking for him. Yes, he and I both already have EPYC systems, and Intel won't do, due to efficiency> I have 352 Genoa cores myself.

 

[Abwx]

Could be more than 8C, which is why I wrote ~8C.

But I think at some point, if your targeting max MT perf, max perf/watt, and max core count at lowest price, then using only P cores often does not make sense (although there are exceptions).

Ideally you’d like to have separate SKUs tailored for each individual user’s needs. But that’s not realistic.

That said, I think e.g. both 8P+0E, 8P+16E, 16P+16E, and 8P+24E could make sense on DT. The question is how many SKUs are realistic to provide. But I think at least some mix of P and E cores would be good. Basically all other CPU manufacturers than AMD already provide that, both on mobile and desktop. I guess they’re doing it for some reasons.

You said on mixed work loads, so that s assuming some multitasking, hence some encoding FI would easily make use of 8 threads while you would have 8 others strong threads for other tasks, because i dont think that one who do nothing with his PC while it s encoding some files.

Now Intel s mixed cores can work as well but from 8 to 16 threads it would be at a big disadvantage peaking at 16 threads with 8 P + 8E facing 16P, and as the thread count increase over 16 the disadvantage would be reduced but only progressivly as the things would be equivalent only when getting close to 32 threads.

 

[adroc_thurston]

then why don’t you buy an EPYC CPU

But I do.

Or are you too poor for that?

-halo is the biggest thing you can stick into laptop.
Gotta make do, kiddo.

 

[Thunder 57]

Why not up to 16 threads, that is , 16C..?...

Because intel cant provide more than 8..?.

That's how I read it. Pretty convenient that only Intel offers what a "typical DT user" wants. That is, ~8 P-cores and a bunch of E-cores.

 

[itsmydamnation]

That's how I read it. Pretty convenient that only Intel offers what a "typical DT user" wants. That is, ~8 P-cores and a bunch of E-cores.

yeah it's funny as , im probably buy a 6 core Zen 5 and its not because i cant afford 16 core.... its cuz im a tight A$$ and value value above almost everything.

 

[maddie]

yeah it's funny as , im probably buy a 6 core Zen 5 and its not because i cant afford 16 core.... its cuz im a tight A$$ and value value above almost everything.

Pareto applied to purchasing?

 

[Fjodor2001]

I think Stefan was talking about 32-128 fat cores with avx-512 for DT performance, but not speaking for him. Yes, he and I both already have EPYC systems, and Intel won't do, due to efficiency> I have 352 Genoa cores myself.

Well, I think Stefan's original concern was w.r.t. what the perf/W will be for Zen5.

I'm suggesting that if it's for MT workloads, then E cores could have improved that, but it looks like there won’t be any on Zen5 DT.

So then the question is what perf/W improvement we can expect from the regular Zen5 cores. There's not been any leaks or even speculation about that IIRC. Or has someone found any such info, or would care to guesstimate?

 

[Fjodor2001]

BTW: What is this "spursindonesia" account? I've not seen a single message from it, but only lots of emoji-spam throughout the threads on the forum. Is it some pure emoji-account? Oh, the times we are living in...

 

[Markfw]

Well, I think Stefan's original concern was w.r.t. what the perf/W will be for Zen5.

I'm suggesting that if it's for MT workloads, then E cores could have improved that, but it looks like there won’t be any on Zen5 DT.

So then the question is what perf/W improvement we can expect from the regular Zen5 cores. There's not been any leaks or even speculation about that IIRC. Or has someone found any such info, or would care to guesstimate?

The problem with e-cores is multiple. When you are using ALL cores 100% of the time, you lose a LOT of performance, and avx-512 is not even allowed, even in the early alderlake's before BIOS updates. I could go on. for Intel they may have a reason for desktop, for distributed computing, none. perf/watt then is a useless metic.

Edit: do you see e-cores in Intel server chips ? Not that I know of (could be wrong), AMD c-cores have 100% functionality, just run a little slower for more density.

 

[StefanR5R]

Intel's e cores are currently only available in hybrid CPUs, that is, in combination with differently performing p cores. Already for this one reason, Intel's e cores are not suitable in compute nodes, as they require homogeneous performance and features across all cores.

Some distributed computing enthusiasts do have Intel p+e CPUs, but even though an e core performs roughly similar to one p HT thread, these CPUs are still awkward to handle in a distributed computing node. Just recently I heard of weird issues with Windows' CPU time accounting on these CPUs. And way before that I saw several reports of performance problems of multithreaded distributed computing applications on these CPUs, which are completely to be expected and can only be worked around by restricting the application to run on cores of same type. [EDIT: I wrote this post before seeing @Markfw's post which already points this out.]

Sometime soon, pure e core server CPUs should become available from Intel. But these many-small-cores CPUs are not targeted to HPC. They could be useful in some sub-niches of the HPC niche but won't be as flexible as pure p core CPUs.

Somewhat similar, Zen 4 dense is targeted to cloud hyperscalers and edge computing at this time, and certainly not to HPC. It remains to be seen whether or not Zen 5 dense's targets will extend further, but AFAICT classic HPC will still be served by Zen 5 non-dense.

On the topic of "efficiency": Let's not forget what Intel's e cores are primarily efficient at: In die area. Would have been nice if Intel had called them "ae cores", for "area efficient cores". In #10,842 I chose the terms area optimized, performance density optimized, and performance efficiency optimized. They are correlated to a degree but not the same. For FP performance density and efficiency, you don't go for cores with cut-down FP execution units. For cache-churning applications, performance and energy efficiency suffer if you go for CPUs with cut down caches…

EDIT 2: For energy efficiency at the application level, energy efficiency of the host (and rack…) is what counts. Due to base consumption by memory, cooling, and so on, very low power CPU cores are typically not putting you into the energy efficiency sweet spot of compute nodes, even in the lucky case that your application is able to scale to a large number of cores with negligible overhead.

 

[carrotmania]

Edit: do you see e-cores in Intel server chips ? Not that I know of (could be wrong), AMD c-cores have 100% functionality, just run a little slower for more density.

There is a 288 e-core (and therefore thread) only server chip coming soon. It will be stomped by 384 thread Turin, in both performance and functionality...

 

[Kaffeekenan]

There is a 288 e-core (and therefore thread) only server chip coming soon. It will be stomped by 384 thread Turin, in both performance and functionality...

Stomped by Bergamo...

 

[Fjodor2001]

There is a 288 e-core (and therefore thread) only server chip coming soon. It will be stomped by 384 thread Turin, in both performance and functionality...

But is the root cause of the problem for Intel that they use e-cores, or that their base core and process tech is worse to start with?

I.e. could the situation for Intel have been even worse, if they had not used e-cores?

 

[jpiniero]

Intel's sold embedded and networking server products using Atoms for years. It's not really a market AMD competes in.

 

[Timmah!]

I think Stefan was talking about 32-128 fat cores with avx-512 for DT performance, but not speaking for him. Yes, he and I both already have EPYC systems, and Intel won't do, due to efficiency> I have 352 Genoa cores myself.

Only 352? What is this heresy :-D

 

[Mahboi]

Now that we've smoked out the rat, I can't wait for details on Zen 5 LP.
Not just the perf, but what did they take out, power draw, etc.
Someone already mentioned that with the split AVX 512 implementation they had in Raphael, they can keep AVX 512 including in the LP cores. But will they?
I want a full breakdown of the thing, see what was taken off, etc. I love low power stuff.

 

[soresu]

Now that we've smoked out the rat, I can't wait for details on Zen 5 LP.
Not just the perf, but what did they take out, power draw, etc.
Someone already mentioned that with the split AVX 512 implementation they had in Raphael, they can keep AVX 512 including in the LP cores. But will they?
I want a full breakdown of the thing, see what was taken off, etc. I love low power stuff.

Be interesting to see areal density too.

Given Bergamo was only a 1.33x increase in cores over Genoa and the Zen5 successor is supposed to be more like 1.5x there must be a significant difference in layout there too.

 

[Markfw]

Be interesting to see areal density too.

Given Bergamo was only a 1.33x increase in cores over Genoa and the Zen5 successor is supposed to be more like 1.5x there must be a significant difference in layout there too.

But Genoa is 5nm, and Turin is supposed to be 3 or 4 nm ?

 

[Mahboi]

I'm preparing a little video (no I'm not trying to be a MLID/RGT, it's a different kind of video) about Zen 5, can we recap what we know about its internals?
- 8 wide decode
- Same or higher clocks
- SPECINT +40%
- full width AVX 512 implem

What else?