Question Zen 6 Speculation Thread

[basix]

[...] client Z6 is N2p with 17ML and MiM.
and it's all on fancy 2.5D substrates. Enjoy!

I will enjoy it

I'm still on a 5800X3D, so that will be a very nice upgrade.

 

[inquiss]

This is what happens when you feed the troll.

When one of the rumour sites picks up this thread and I can send you the link of the article I'll be very pleased.

 

[Kaffeekenan]

see, your fuhrerbunker rants have no relation to reality, where non-poverty client Z6 is N2p with 17ML and MiM.
and it's all on fancy 2.5D substrates. Enjoy!

17ML? MiM? Please dumb it down a bit. Thanks.

 

[Josh128]

It was

View attachment 124597

This doesnt necessarily prove much considering the fact that what came to be known as Strix Halo actually does use N3. Its very possible Strix Point, being mobile with low power priorities, was planned for 3nm. Theres zero evidence that desktop Granite Ridge was ever going to be 3nm. Why is the lith node for GR blurred? Thats what we need to see.

 

[MS_AT]

17ML? MiM? Please dumb it down a bit. Thanks.

Most likely Metal Layers. Metal Insulator Metal.

 

[StefanR5R]

Re #3,167, #3,191 (rumored CUDIMM support by a next-generation AM5 CPU, perhaps to appear in Q3/2025):
- - - edit, moved my post to the Zen 5 speculation thread

 

[511]

17ML? MiM? Please dumb it down a bit. Thanks.

Metal Layers you can throw more metal layers to increase performance.
MiM is reference to Metal Insulator Metal capacitor that are used for Power Delivery N2 capacitor only matches the one in Intel 7 though.

Intel 4 Process Drops Cobalt Interconnect, Goes with Tried and Tested Copper with Cobalt Liner/Cap - Semiconductor Digest

At the VLSI Symposia in June, Intel presented a paper “Intel 4 CMOS Technology Featuring Advanced FinFET Transistors Optimized for High Density and High-Performance Computing.” Blogger Dick James reports on details of the interconnect strategy.

www.semiconductor-digest.com

 

[adroc_thurston]

what came to be known as Strix Halo actually does use N3

It doesn't.

 

[OneEng2]

I wouldn't doubt @Kepler_L2.

No disrespect intended for @Kepler_L2 . He seems like a straight shooter and brings good value to the conversation.

I am simply wary of the source material that seems quite armature for any presentation from a major OEM. Still, that doesn't mean it isn't accurate, only that it is unlikely it was ever something AMD created. Perhaps created by an engineer on his lunch break .

From chinese forums

The partial AMD roadmap, which originated from China, claims that AMD will market its Zen 5 processors under the Ryzen 8000 branding, with both mainstream Ryzen processors and APUs reportedly uniting under the Ryzen 8000 branding umbrella. The rumored codenames for Ryzen 8000 chips and APUs are Granite Ridge and Strix Point, respectively.


ExecutableFix, a hardware leaker with a solid record, believes that Zen 5 is based on the 3nm process node. Given AMD's long-lasting relationship with TSMC, it's very likely that Zen 5 will tap into the foundry's 3nm (N3) manufacturing process. Then again, Samsung also has its own 3nm process node, so it'll be interesting to see whether the South Korean giant can woo AMD away from TSMC.

AMD's Zen 5 CPUs, APUs Will Likely Tap TSMC's 3nm Process Node

Cutting-edge CPU on a cutting-edge node

www.tomshardware.com

... and as you point out, AMD did in fact tap into TSMC N3 (N3E to be specific). What I keep pointing out is that AMD only used N3E for its highest margin lowest volume parts while using a lower cost N4P for all high volume parts where margins are much slimmer.

Thanks for the link.

It is my belief that the rumors then as now are hearing one thing and then repeating something different or more specific that was not originally stated. Yes, Zen 6 will utilize TSMC N2. That does NOT mean that Zen 6 will not also utilize N3P.

This doesnt necessarily prove much considering the fact that what came to be known as Strix Halo actually does use N3. Its very possible Strix Point, being mobile with low power priorities, was planned for 3nm. Theres zero evidence that desktop Granite Ridge was ever going to be 3nm. Why is the lith node for GR blurred? Thats what we need to see.

Agree. As I said above, it also makes sense from a financial standpoint.

 

[511]

For CPU process selection designer usually try out couple of process before selecting final one .
It may have been possible that Zen5 was supposed to use og N3 but stuff happened and it got moved to N4P and Turin dense to N3E.

 

[Josh128]

It doesn't.

It does.

*EDIT: Well I'll be damned. It doesnt?

https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-max-plus-395.html

 

[jpiniero]

It does.

It uses N4P for the IO Die.

But yes... The "Leakers" were saying for the longest time it was using N3. They were wrong, yet again.

 

[511]

It does.

It doesn't lol everything is N4P

 

[Josh128]

I see. Why did I think all this time the GPUIOD was 3nm? Did I just dream this up or was it on a false leaked roadmap or something? I could swear I remember seeing something very matter of fact about that.

https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-max-plus-395.html

 

[MS_AT]

But yes... The "Leakers" were saying for the longest time it was using N3. They were wrong, yet again.

Care to cite them, or is it another time that someones imagination took over. The misplaced leaks about Halo were LP cores in IOD and GMI links (which ended up partially true).

 

[eek2121]

It certainly got them deeper into the red faster than ANY other process available on Earth at that time.

There seems to be a lack of acknowledgement around here that building the best processor in the world doesn't matter at all if you go bankrupt doing it. Now our friends at Intel used the most expensive tech on Earth and STILL didn't produce the best processor in the world.

Intel’s company culture has been destroying everything. Talented engineers are laid off or allowed to leave because $$$. Those that stay are not allowed to make any decisions of noteworthiness because of fear it will upset revenue/margins/the business/stock prices.

The only way it could change is from the top, which will never happen because nobody at the top understands it takes talented and focused engineering to create a good product, and a good product is necessary to have market leadership.

Note that AMD is also now struggling with that issue as well, however the culture hasn’t yet consumed the company.

Culture is why I say Qualcomm will never be a serious competitor. They also have a similar culture to Intel, they were just lucky enough to have more patents and a stronger legal team. To my knowledge, client computing is the first entrenched market in recent times that they have tried to break into with some honesty. With Apple moving towards their own modems and desktop qualcomm parts seeing a high return rate, the engineers are finding themselves to be at odds with the money guys.

Also,
Client
Zen 2,3 ->7nm Node
Zen 4,5 ->5nm Node

Why do you believe that AMD will now suddenly change?

Because Intel.

That attitude is exactly why when it happens, ignorant people in the west will be shocked and bewildered.

No disrepsect to China. However, Don’t hold your breath.

China is good at industrial scale, and copying simpler IP. The problem with chip fabrication is that it uses some of the most advanced tech mankind has ever invented. To put it another way: Chips aren’t bicycles.

I’m not doubting they will have further advances, I just doubt they will surpass TSMC and other countries until everyone hits a brick wall. Then maybe they can find a way to do it cheaper…maybe…

 

[inquiss]

It is my belief that the rumors then as now are hearing one thing and then repeating something different or more specific that was not originally stated. Yes, Zen 6 will utilize TSMC N2. That does NOT mean that Zen 6 will not also utilize N3P.

Now you're trolling....This is exactly what people have been saying in this thread. Desktop and server get N2 class and volume stuff uses N3 class.

What's changed here to make you now accept the reality of what's been written for several pages now?

 

[Fjodor2001]

Desktop and server get N2 class and volume stuff uses N3 class.

By volume stuff, do you mean mobile/laptop?

Wasn’t there some speculation before Zen5 release that on Zen6, DT would be based on mobile instead of server?

Also, would you normally not want to have the latest node for mobile, to get lower power consumption and better battery life?

 

[inquiss]

By volume stuff, do you mean mobile/laptop?

Wasn’t there some speculation before Zen5 release that on Zen6, DT would be based on mobile instead of server?

Also, would you normally not want to have the latest node for mobile, to get lower power consumption and better battery life?

Anything monolithic is getting N3 per this thread. Anything high end is using N2. So that means servers, desktop retail, threadripper I'm guessing. Someone can correct me but I'm interpreting the comments on desktop being based on mobile as like mobile high end and desktop merging in how they look and function.

The node choice makes sense to me. When AMD launched on TSMC on 7nm they only had that on a good node. Now with the high end on N2, mainstream on N3 and legacy stuff on N4 they have access to many more options for volume. Where Intel has had a stranglehold on OEM I expect a big part of that OEM angle has been the volume they can provide. With each gen AMD is adding mass and options on nodes to draw from, so much IP on each node to mix and match that I expect OEM deals to become more likely.

 

[511]

Intel’s company culture has been destroying everything. Talented engineers are laid off or allowed to leave because $$$. Those that stay are not allowed to make any decisions of noteworthiness because of fear it will upset revenue/margins/the business/stock prices.

The only way it could change is from the top, which will never happen because nobody at the top understands it takes talented and focused engineering to create a good product, and a good product is necessary to have market leadership.

This is changing they are saying goodbye to so many Top and Middle Management under Lip Bu Tan.

 

[adroc_thurston]

This is changing they are saying goodbye to so many Top and Middle Management under Lip Bu Tan.

Flatter management is nice and indeed is happening but they've already lost a ton of talent.
It ain't gonna be easy.

 

[branch_suggestion]

It uses N4P for the IO Die.

But yes... The "Leakers" were saying for the longest time it was using N3. They were wrong, yet again.

Original Halo was N3 for the IOD with Z5LP cluster, got canned along with all the other nice configs to shill GEMM cancer.

 

[511]

Flatter management is nice and indeed is happening but they've already lost a ton of talent.
It ain't gonna be easy.

Yeah that is true

Original Halo was N3 for the IOD with Z5LP cluster, got canned along with all the other nice configs to shill GEMM cancer.

Yeah the GEMM Cancer is the worst thing we got Die Waste Unit out of it.

 

[Thibsie]

Flatter management is nice and indeed is happening but they've already lost a ton of talent.
It ain't gonna be easy.

Nope but necessary evil IMO.
In 3-5 years, they should come with real nice designs. Or they will fall.

 

[adroc_thurston]

Nope but necessary evil IMO.
In 3-5 years, they should come with real nice designs. Or they will fall.

Unified Core is hail Mary, duh.