Isn't TDP too high no matter what?
It's a server CPU that consumes this kind of power all the time.
Isn't TDP too high no matter what?It could be reworked and still gulp 20W+ doing nothing.
Sometimes I wish we lived in an alternate timestream where IBM made consumer-level 1c/8t products with SMT8.
@Fjodor2001
I've heard TDPs of 350-400W quoted for the 48c/48t part. Could just be rumours and nonsense. Regardless you'll get better MT performance out of the already-been-out-for-a-year+ Threadripper, plus more memory bandwidth, better I/O, basically the whole nine yards.
Nova Lake-S won't be a server CPU though. For a TR part, people are used to 350W TDP, but for desktop? Just cooling that monstrosity in a consumer socket will be . . . interesting.Isn't TDP too high no matter what?
It's a server CPU that consumes this kind of power all the time.
If the power consumption is 300W at the maximum load, there is already an example of Raptor Lake, so I can understand...Nova Lake-S won't be a server CPU though. For a TR part, people are used to 350W TDP, but for desktop? Just cooling that monstrosity in a consumer socket will be . . . interesting.
It'll be more interesting to see what will be the PPT value. AMD has already backed off from 1.35x on Zen5.If that is correct, the TDP of the flagship ZEN6 with 24 cores 48 threads is around 200W.
I agree with that! :-)Well, depends.
If the precious task (interactive task) needs much of the throughput of a core, then yes, keeping context switches and other CPU time consuming stuff away from the task's core will reduce the response times of this task. Perhaps perceptively if the other stuff consumes a lot of CPU time also. In any other case, it is irrelevant if we are talking about human-computer interaction here.If you have a thing you care about and a bunch of stuff that has to be done but is not so critical, if you dedicate one core to your precious task and the "background" to remaining cores you will increase its responsivness compared to the situation you had one core that had to handle both your precious task and eveything else.
Or: More cores are good for throughput and therefore good for response times in throughput bound situations, not for "snappiness".The upshot is: More cores are good for throughput (to a degree which depends on your algorithms and data), not for responsiveness.
So you were throughput bound during parts of the boot process of Windows 11, and were able to reduce the response time from power on to desktop ready by adding more hardware throughput. If we include response times of throughput bound scenarios — e.g. system boot time — into what we call "responsiveness", then yes, some more cores or some more hardware threads are good for "responsiveness". :-)I would have to disagree based on turning off HT on a Core i5-10105. Idea was that without HT, the CPU would get less hot, it would be able to boost higher and responsiveness would improve. But the opposite happened. Win11 took much longer to load. Those measly four cores got overloaded quickly […]
Did you instrument the boot process and measured how much CPU time was spent in actual computation, and how much CPU time was spent in context switches?[…] to a point where the OS was spending more time interrupting processes and juggling threads, all in an attempt to be "fair" to all the processes.
i worry the hotpot will be even higher for 6Ghz and the crappy cooling with OEMs i don't have high hopes for mobile.All the N2P stuff should be over 6GHz, dunno about N3P versions of Zen6.
I guess that's not what you can expect from a laptop.i worry the hotpot will be even higher for 6Ghz and the crappy cooling with OEMs i don't have high hopes for mobile.
… with AMD: the PPT limit,also TDP doesn't matter all that matters is […]
Nevermind which parameters AMD's and Intel's marketing print in big font and which they relegate into the fineprint — at least journalists should look up PPT limit and PL2 and communicate those. I have no idea why they generally don't.If Intel annonces 400w TDP, expect it to suck 500W minimum, IMO.
Cost won’t differ much from previous gen. The only wild cards are tariffs and war.I agree with that but in context I was saying I think the 12 core X3D won't be the best seller because of cost. I think people may settle for non-X3D versions instead, or just wait for cheaper X3D variants to appear. I could very well be wrong. Today's gamer is typically not a patient person.
Well, it's time to increase the number of coresCost won’t differ much from previous gen. The only wild cards are tariffs and war.
That's what i said unless i am taking in language of Gods 🤣… with AMD: the PPT limit,
… with Intel: PL2 and how long it is allowed to be sustained (possibly indefinitely, if set so in the BIOS), after that PL1.
No but I can do it if you let me know how.Did you instrument the boot process and measured how much CPU time was spent in actual computation, and how much CPU time was spent in context switches?
I would expect a return to ~230W-250W PPT for the 24 core versions of Zen 6 if it can indeed hit 6GHz+. Going against a 300W N2 52 core Nova Lake, you can be certain they wont be leaving any perf on the table due to PPT selection. Its possible they stick to 200W default operation for "optics", but enable 250W+ for PBO or "Ultra" modes.If that is correct, the TDP of the flagship ZEN6 with 24 cores 48 threads is around 200W.
It's the exact opposite iirc a real core is assigned first unless all the real cores are exhausted the HT is not InvokedNo but I can do it if you let me know how.
The simplest explanation I can think of is that HT helps improve responsiveness by letting the core do more work while threads are waiting for I/O. Instead of an I/O bound thread monopolizing a core completely and not letting any other thread run, it is paused and the next thread is allowed to run but since it is the same core, the context latency is much lower as the data doesn't have to go over the ring to the other physical core(s). So it is a combination of quicker context switching as well as elimination of ring latency.
On Intel's dumb Arrow Lake, that advantage is now gone. Every context switch is now going to involve loading up data over the ring.
I agreeI would expect a return to ~230W-250W PPT for the 24 core versions of Zen 6 if it can indeed hit 6GHz+. Going against a 300W N2 52 core Nova Lake, you can be certain they wont be leaving any perf on the table due to PPT selection. Its possible they stick to 200W default operation for "optics", but enable 250W+ for PBO or "Ultra" modes.
6+ GHz is 2.5x the frequency of microwave ovens. Switching billions of transistors at that rate is going to put out some serious heat, thus requiring serious power, regardless of the process used.
Yeah that's why gamers were hating the E-cores. Instead of giving the workload to the virtual core in bed with you, you walk out the door, knock and give your workload to the E-core cluster. Dumb.It's the exact opposite iirc a real core is assigned first unless all the real cores are exhausted the HT is not Invoked
Funny how they don't disable SMT on Ryzen.Gamers complaining about SMT and gamers complaining about E Core (BigLittle)...
Even in Japan, where I live, there are people in the PC community who disable SMT and play games.Funny how they don't disable SMT on Ryzen.
You: Power limits are higher than the parameter TDP.That's what i said
Yup. Cache pressure is the deal killer for SMT. Need bigger, faster caches for better SMT. I think that's why IBM went with the virtual cache scheme: https://www.anandtech.com/show/16924/did-ibm-just-preview-the-future-of-cacheswhile also spilling L2 cache at the same time.