Question Zen 6 Speculation Thread

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LightningZ71

Platinum Member
Mar 10, 2017
2,195
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This doesn't fit AMD at all. It looks more like a wishlist from a random forum user.
It is LITERALLY just a scaled up Strix Point, with one CCX having P cores and the other having dense cores. The only practical difference is that they are also on different CCDs.

With Strix Point, AMD proved, once and for all, that their CCXs on the same processor can be asymmetric in core count and density design (which is already moot as they are logically identical). Aside from physical packaging constraints and possible power delivery limitations, there is no reason that they can't mix CCDs on the same processor.
 
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LightningZ71

Platinum Member
Mar 10, 2017
2,195
2,676
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I figured as much but some early "leaks" or "rumors" whatever you want to call them seem to suggest Zen 7 is moving to 2MB L2. I don't see it happening but it's too early to really speculate IMHO.
2MB of L3 makes more sense if you move all the L3 off the CCD and into a stacked die. It helps hide the latency hit.
 
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OneEng2

Senior member
Sep 19, 2022
559
801
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Why would there be a link?
That would require AMD disclosing these things, which they rarely do, and such decisions aren't exactly put on PPT slides, either.


Intel might have booked so much N3b capacity so far in advance that the booked wafers were more than enough to satisfy the weak demand for their products even at a "meh" yield rate.
Yield can also mean clock speed variation, plus compared to mature processes, even a 65% yield rate can be considered poor.
Pat himself also hinted at Lunar Lake being a lossy product for them, so there's that.
Fair enough; however, believing that N2 would be used for ALL Zen 6 markets flies in the face of history and common sense. N2 will ALSO be limited in supply, expensive, and lower yield than N3.

How is Zen 6 any different from Zen 5 with respect to the production processes it will use?
Otherwise he is free to speculate just like anyone else. I (and others) may not like they way he posts a lot with short curt responses or never being able to admit when he was wrong but he's free to do so.
Agree. Unfortunately there is no forum rule stating you can't be intentionally obnoxious.
Zen6 10950X
8+24+4+4CU, 100+ TOPS
N2
2026Q3
$799
Best speculation I have seen in this thread for some time .

I tend to disagree though. I think it more likely that we will see:

Zen 6 10950X
12c CCD x2 = 24 (full Zen 6) + 4 LP Zen 6c on IOD
N3P
2026 Q2
$699

We have AMD saying that Zen 6 is going to receive a boost in the IOD having support for 1:1 clock speeds on DDR7200 or possibly even DDR8000. This would greatly lower latency to main memory as well as greatly improving bandwidth. This would be needed of course as moving from 16 to 24 cores alone would need this improvement. If Zen 6 gets higher IPC, then it would likely need even more bandwidth per core than Zen 5.

Since the IOD on the server is rumored to support 4 channel memory, I can see some pretty interesting thread ripper combinations for Zen 6.

So fiscally unavailable. If it yields so low and has costs too high, there is no money to be made, so it is effectively unavailable, even if it's possible to use it to create a chip. I'm sure that Intel can make chips using 18a-p, but only in the test lab. It might be available, but your accountants would have you drug out and executed.
I think that AMD has been much more financially responsible (lately) than Intel. This is also why I am speculating that desktop Zen 6 will (like Zen 5) not use the bleeding edge process node while the DC will.
I would absolutely want 12+24 over 12+12. All day, any day. I think we only get 12 core CCDs on desktop/mobile, so I think the discussion is moot.
Agree. I think it a possibility that the IOD will contain 4c of Zen 6c though.
Leak or don't leak. If someone is walking a tightrope between revealing partial information without revealing sources, there are more succinct (and less combative) ways to do it than what we're seeing here.
Agree. Some semblance of an educated debate would be greatly appreciated .
The info is from presentation slides. Will not spoonfeed anyone with source, but just trust me on it...
Which presentation slides?
A market in which customers are running Cinebench 24/7/365 _does_ _not_ _exist_.
Agree, and good point.

What is the lions share of the market going to do with all those cores? I suspect I would get a pleasant surprise rendering my family holiday videos (2 to 3 times a year), but most people don't even do this.
 
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OneEng2

Senior member
Sep 19, 2022
559
801
106
Who even said that.
Who said N3B had issues and forced AMD to use N4P on Zen 5?

Back to reality here for a minute.

When has a new process EVER exceeded yields on a more mature process? When has anyone ever even expected this to be true?

Do you also deny that N2 is more expensive than N3P?
It's no different at all, which is why it's the latest available node unless things go awry.
And they didn't so you get to enjoy N2p (outside of valuetown, anyway).
Again I ask, if AMD can compete (and exceed) Intel from a node behind (as they are clearly doing today), why would AMD shell out the money, and take the risk on having everything for Zen 6 on N2?

I do agree that much depends on if AMD believes they can compete with Nova Lake with Zen 6 on N3P or if they believe they need the extra boost from N2.

All this being said, I would love for AMD to "shoot the moon" on Zen 6 and go all out. I just don't see it in the cards as they have no reason to.
 
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marees

Golden Member
Apr 28, 2024
1,077
1,487
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Who said N3B had issues and forced AMD to use N4P on Zen 5?

Back to reality here for a minute.

When has a new process EVER exceeded yields on a more mature process? When has anyone ever even expected this to be true?

Do you also deny that N2 is more expensive than N3P?

Again I ask, if AMD can compete (and exceed) Intel from a node behind (as they are clearly doing today), why would AMD shell out the money, and take the risk on having everything for Zen 6 on N2?

I do agree that much depends on if AMD believes they can compete with Nova Lake with Zen 6 on N3P or if they believe they need the extra boost from N2.

All this being said, I would love for AMD to "shoot the moon" on Zen 6 and go all out. I just don't see it in the cards as they have no reason to.
A lot depends on TSMC price

They've been on an insane hiking spree
 

adroc_thurston

Diamond Member
Jul 2, 2023
5,682
7,901
96
Who said N3B had issues and forced AMD to use N4P on Zen 5?
AMD.
When has a new process EVER exceeded yields on a more mature process?
N5?
Do you also deny that N2 is more expensive than N3P?
A tiny bit.
Again I ask, if AMD can compete (and exceed) Intel from a node behind (as they are clearly doing today), why would AMD shell out the money, and take the risk on having everything for Zen 6 on N2?
There are competition besides Intel you know.
I do agree that much depends on if AMD believes they can compete with Nova Lake with Zen 6 on N3P or if they believe they need the extra boost from N2.
No one cares about NVL.
 

eek2121

Diamond Member
Aug 2, 2005
3,339
4,914
136
Fair enough; however, believing that N2 would be used for ALL Zen 6 markets flies in the face of history and common sense. N2 will ALSO be limited in supply, expensive, and lower yield than N3.
You can blame Intel. Oh and it won’t be vanilla N2/N2P. Contrary to what other posts have stated, AMD and TSMC have worked closely on optimized libraries for developing high frequency, high performance CPUs since/before Zen 3 (i.e. a custom process). I don’t know what next-gen will ultimately be called, but I am sure more will come out soon. Until then? 🍻
 
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