That was Raja KoduriBack in late 2018, Vega 20 was the first chip to come out along with a couple of phone socs on N7, which was as big of a jump as N2 is supposed to be. I don't understand why some people keep repeating the same old talking points, that N2 is too expensive bla bla, as if they actually know any hard data point.
Just ordered a couple Instinct MI50s for $110 each to play with their double precision (6.705 TFLOPS (1:2))Back in late 2018, Vega 20 was the first chip to come out along with a couple of phone socs on N7, which was as big of a jump as N2 is supposed to be. I don't understand why some people keep repeating the same old talking points, that N2 is too expensive bla bla, as if they actually know any hard data point.
She was just as much CEO back then as she is now and wouldn't have approved that choice unless they considered it a net positive.That was Raja Koduri
This is Lisa Su
Hard to say if this is the right thread to continue, but...
Computerbase reports that mainboard makers told them at Computex that CUDIMM support is coming, presumably with a new cIOD. Which datarates will be supported then is not yet fixed.
- Zen6 will be a H2 (probably Q4) product, since N2 HVM only starts in H2
Computerbase wrote "The next CPU generation presumably gets a new IOD, and with it a memory controller which supports CUDIMMs" [fully, not just in bypass mode]. It is not clear to me what "the next CPU generation" which the mainboard makers alluded to actually was.If there is a new IO chips (for Zen 5) wouldn't it make sense for it to Strix Halo packaging and Strix Halo CCDs?
Computerbase wrote "The next CPU generation presumably gets a new IOD, and with it a memory controller which supports CUDIMMs" [fully, not just in bypass mode]. It is not clear to me what "the next CPU generation" which the mainboard makers alluded to actually was.
My guess is that Strix Halo will remain the only Zen 5 product which is moved to fanout. This CUDIMM support might be Zen 6, or an upcoming Zen 5 AM5 APU, or Granite Ridge but with refreshed IOD and switched to GMI wide mode. (Narrow doesn't make much sense combined with CUDIMM speeds.) Somehow a Granite Ridge refresh seems unlikely to me, and Zen 6 seems still further away than for mainboard makers having a loose tongue about one of its features at Computex now... so, maybe a Strix Point based desktop APU? (That is, enhanced IMC yes, but not exactly in the form of an IOD.)
this would be epically omega true but CPU tile tapes out first. bad news!If the Strix Halo interface (to IOD) is compatible with Zen 6 interface (not necessarily the case, just saying "what if"), then AMD could de-risk Zen 6 launch and have a mid-gen upgrade for Zen 5 by releasing Zen 5 (Strix Halo CCD) with this new IOD ahead of Zen 6 launch.
Each of Strix Halo's CCDs is attached with 32 Bytes read per cycle/ 32 Bytes per cycle write to its IOD (source).If the Strix Halo interface (to IOD) is compatible with Zen 6 interface (not necessarily the case, just saying "what if"), then AMD could de-risk Zen 6 launch and have a mid-gen upgrade for Zen 5 by releasing Zen 5 (Strix Halo CCD) with this new IOD ahead of Zen 6 launch.
I don't see anyway that Zen 6 DOESN'T have a new IOD. In addition to the rumored LP cores (I'll believe that when I see it).From what we are hearing, Zen 6 MUST have a new IOD as compared to Zen 5 DT. Assuming that it's true, then it must have full CUDIMM support natively to stay market relevant. I would also assume such for low end desktop and desktop APUs of the Zen6 generation.
Do you have a link about that? I have not been able to find a single discussion pertaining to Zen 5 and N3B.Well AFAIR, Zen5 was supposed to be N3(B). N3B failure made them port it to N4P.
So N4P wasn't a conservative choice at all, just fallback. The argument against N2 for Zen6 just falls to oblivion IMO.
There is certainly plenty of talk on the subject, and also a few leaks, but I don't recall any official AMD statement on the subject. I would say that it makes sense in many ways though.From what we are hearing, Zen 6 MUST have a new IOD as compared to Zen 5 DT. Assuming that it's true, then it must have full CUDIMM support natively to stay market relevant. I would also assume such for low end desktop and desktop APUs of the Zen6 generation.
I think the increased core count and higher demanding GPU capabilities suggest that a faster and lower latency RAM interface would be required.I don't see anyway that Zen 6 DOESN'T have a new IOD. In addition to the rumored LP cores (I'll believe that when I see it).
RDNA 3.5 iGPU, CUDIMM support, improved DDR5 memory controller, improved USB high speed support, and much more.
On-die USB4 would be nice so we can stop wasting x4 pcie 5.0 lanes for an x2 pcie 4.0 USB4 controller.Improved USB high speed support
Can't do on AM5 though, all pins already assigned.On-die USB4 would be nice so we can stop wasting x4 pcie 5.0 lanes for an x2 pcie 4.0 USB4 controller.
I want my two dedicated cpu m.2 slots back.
Hopefully if they go that way, the new chipset links at pcie 5.0 so there's more bandwidth to support USB 4 in addition to the other peripherals typically hung off chipset lanes. 4.0 x4 is extremely constraining.Can't do on AM5 though, all pins already assigned.
AMD could make some kind of new "promontory 25" chipset that includes USB4 ports. That's more likely.
Crazy to imagine when USB was first introduced, but you are correct. That is very constraining these days.Hopefully if they go that way, the new chipset links at pcie 5.0 so there's more bandwidth to support USB 4 in addition to the other peripherals typically hung off chipset lanes. 4.0 x4 is extremely constraining.
Crazy to imagine when USB was first introduced, but you are correct. That is very constraining these days.
We shouldn't even need a "chipset" on the lower end. Why should A620 and B840 continue to exist? You'd have a cheaper and simpler low end/midrange if everything was built into the CPU and you only needed a chipset to provide additional capabilities for higher end 'Z' level boards. And since it is only the higher end that gets it you don't have to skimp on links to the chipset.
As a base level provide enough lanes for a couple m.2 links, two USB4, four 3.2 and two 2.0 (or something like that) and of course one x16, plus HDMI, ethernet and audio. When Zen 6 comes out it would be appropriate to drop SATA from the "base" and support it only on the higher end systems that have a separate chipset. The Z boards would have a chipset that provides more x16 slots, two more m.2, SATA ports, more USB, DP, basically "more".
Well, since there is no chipset, there is no need to make it I guess? But X600 exists so to speak, if you look up X600 DeskMini spec page, it's listed there https://asrock.com/Nettop/AMD/DeskMini X600 Series/index.asp#SpecificationAMD has CPU's without chipsets. A300, X300. Nobody cared, so they stopped making them in future versions.