Keep in mind that the cores in IOD will not share caches with CCDs. Every time you will put CCD to sleep you have to flush caches (you want to cut power to SRAM too as it always drains power). So when you wake the cores up you have to populate them again, etc. This costs both time and power.Why not?
In other words it becomes a balancing act as you have to decide when to handle over, you complicate scheduling and your user who bought 600$ CPU will get choppy experience when trying to run speedometer because you got the scheduling thresholds wrong. Only to save few watts that are drowned out by power innefficiences of the power supply. I mean sure, they might be able to run the workload good enough, but for good enough you could have bought n100
This is why I would dedicate LP cores only to predictable low interactive tasks, ideally background tasks. And ideally give the OS an API that would let software devs mark needed QoS level of the threads their program is using. It is also not to say they will be useless as they can handle background OS stuff giving big cores more time to serve the user.
This could work quite fine with this https://www.guru3d.com/story/windows-11-25h2-introduces-user-interactionaware-cpu-power-management/
But anyway this is more or less my reasoning why