The "Advancing AI" event slide did not have an endnote detailing how to understand the figure.
They can make it mean anything they want in retrospect, if needed.
The "Advancing AI" event slide did not have an endnote detailing how to understand the figure.Do note this is calculated from conservative epyc figures
Not that hard, ive ran multiple Zen5 cpus above 6 ghz (on watercooling)6GHz is really hard...
Stock PPT limit for a 7950X is 230w, not 250wCome to think of it, Zen4 seems to be almost at the limit at 250W.(7950x)
What we were able to achieve in Raptor Lake 6ghz was the fact that many things overlapped.
My Epyc 4585PX runs 5.7 ghz stockAFAIK EPYCs do not casually run at 5.7GHz... The quoted 1.7x figure is surely for a top model which means a strongly thermally/power limited SKU. That means 2nm should allow higher real frequency than 2.25/3.7GHz of Bergamo.
Besides that, the new platform increases the number of memory channels and TDP which suits many server workloads.
Mind you that the Zen 5's "server IPC improvement" led to that laughable Zen 5 +40% IPC hypetrain.
Well, it's not impossible, but... I feel like I've achieved 6GHz by doing this far.Not that hard, ive ran multiple Zen5 cpus above 6 ghz (on watercooling)
Stock PPT limit for a 7950X is 230w, not 250w
And they scale way past 300w as long as you can keep the temps in-check, something lower vmax will help alot with
My Epyc 4585PX runs 5.7 ghz stock
But yeah i fully understand your point and what your trying to say, i only wanted to fix the wrong napkin math from above.. (comparison was with 1.34x more cores, not 1.5x)
The only thing we know for certain are that the higher core count and lower clocked EPYC SKU's we will see a +27.5% per core performance increase, if the offical AMD slide are to be believed.
How this relates to desktop remains to be seen, but i will be surprised if we dont see way above 6ghz for highest SKU.
Rang the cry throughout the Intel dominant, pre-Zen era.However, most of the architecture improvements to improve the IPC have been done..
That's right That's because Intel was just lazyRang the cry throughout the Intel dominant, pre-Zen era.
Maybe you do research in advanced CPU architectures, but unless you do, this is merely your opinion.That's right That's because Intel was just lazy
But it's a thing of the past
However, it is real that the range of improvement in performance is small.
It will remain small unless you find a way to do it.
Well, this is just my guessMaybe you do research in advanced CPU architectures, but unless you do, this is merely your opinion.
Maybe there is a misunderstanding here. I think people talking about 6GHz+ clocks are talking only about single core peak boost clock. Not about the multicore steady clock that is affected by the power limit. Single core on either Raptor Lake or Zen4/5 when boosting high does not come close to the power limit.Come to think of it, Zen4 seems to be almost at the limit at 250W
Nope, I stated a historical fact. I don't know about future IPC increases, and admit it.Well, this is just my guess
But it's the same for you, each other
Keller told that a lot during his 2018-2019 "Intel speeches". An yeah, we have got some IPC since then.What we do know is that Keller claimed there's a lot of room for additional IPC improvements. How? ?????
Lisa Su herself presented a slide about Epyc Venice detailing a 1.7x improvement.
Given the expected 1.34x (256 vs 192) core count increase that leaves roughly 1.275x improvement from IPC and clock.
Suddenly we're above that +25% performance increase per core you call "hope and dreams" 😅
To reach +27.5 performance with a +10% IPC increase, you need a ~ 1.16% clockspeed increase
5.7ghz * 1.16 = 6.612ghz
Do note this is calculated from conservative epyc figures
Optimization tricks. Profile the most common code and look at where the most time is being spent then reduce that time spent doing that particular thing. HT is one such trick. It effectively increases the IPC of the core in multicore workloads by ensuring that the core resources are never completely idle and some instructions of either thread are always in flight. Then there's the branch prediction accuracy.What we do know is that Keller claimed there's a lot of room for additional IPC improvements. How? ?????
Improving this can allow a longer, higher frequency pipeline, without increasing misprediction penalties.Then there's the branch prediction accuracy.
Sorry about thatNope, I stated a historical fact. I don't know about future IPC increases, and admit it.
Back in the day, when Intel was king, I repeatedly asked if there was some theoretical limit to IPC, and was given the same answer as you do now.
"It's hard from here to get significant IPC increases." None ever answered the direct question of "theoretical limit to IPC".
What we do know is that Keller claimed there's a lot of room for additional IPC improvements. How? ?????
Yea, on EPYC which is completely power limited.Lisa Su herself presented a slide about Epyc Venice detailing a 1.7x improvement.
Given the expected 1.34x (256 vs 192) core count increase that leaves roughly 1.275x improvement from IPC and clock.
Suddenly we're above that +25% performance increase per core you call "hope and dreams" 😅
This exactly. On desktop, the top clock is likely due to thermal density issues at max clock rate.AFAIK EPYCs do not casually run at 5.7GHz... The quoted 1.7x figure is surely for a top model which means a strongly thermally/power limited SKU. That means 2nm should allow higher real frequency than 2.25/3.7GHz of Bergamo.
Besides that, the new platform increases the number of memory channels and TDP which suits many server workloads.
Mind you that the Zen 5's "server IPC improvement" led to that laughable Zen 5 +40% IPC hypetrain.
Agree.... I don't disregard adroc because he is adroc though. I disregard his posts because he fails to provide any evidence .... or even reasoning behind his boldly stated "facts". In fairness, I would feel this way about anyone's posts given the same context.Eloquently put.
That's why I will disregard any talk about 6+ GHz frequencies, even from adroc.
I believe that the real reason that large IPC improvements are "a thing of the past" is due to the fact that large increases in transistor density are also "a thing of the past".That's right That's because Intel was just lazy
But it's a thing of the past
However, it is real that the range of improvement in performance is small.
It will remain small unless you find a way to do it.
13% average is not 8-12%.Zen 4 desktop gained ~50% MT core for core vs Zen 3 when comparing 16 core SKUs. This was due to increased MT clocks and very minor 8-12% IPC gains.
Im aware of AMDs chart. I know CB R23 is only about +6%. I think a lot of the larger numbers in their chart are due to increased memory speed and bandwidth. R23 doesnt touch memory. I consider Zen 4s actual IPC vs Zen 3 at the same memory frequency to be a bit less than AMDs claims here.13% average is not 8-12%.
AMD Ryzen 7000: Vier neue CPUs bieten +13 % IPC und bis zu 5,7 GHz Takt
AMD hat tief gestapelt und zur Vorstellung überrascht: Die neuen Ryzen 7000 sind nicht nur schneller, sondern zum Teil auch günstiger.www.computerbase.de
7Zip is 13%, that s remarkable and a more relevant number for usual apps that are mainly INT, CB R23 is FP, beside R23 1T is 9% in this chart, not 6%...Im aware of AMDs chart. I know CB R23 is only about +6%. I think a lot of the larger numbers in their chart are due to increased memory speed and bandwidth. R23 doesnt touch memory. I consider Zen 4s actual IPC vs Zen 3 at the same memory frequency to be a bit less than AMDs claims here.
Lisa Su herself presented a slide about Epyc Venice detailing a 1.7x improvement.
Given the expected 1.34x (256 vs 192) core count increase that leaves roughly 1.275x improvement from IPC and clock.
Suddenly we're above that +25% performance increase per core you call "hope and dreams" 😅
To reach +27.5 performance with a +10% IPC increase, you need a ~ 1.16% clockspeed increase
5.7ghz * 1.16 = 6.612ghz
Do note this is calculated from conservative epyc figures
Yeah, but its not true. Just like Zen 4 to Zen 5 R23 claimed uplift of 17% IPC is not true.
Its not for nT. IPC is not a relevant metric to nT due to varying clocks depending on power efficiency and draw. Even if it was, it only improves by 1% vs ST, going from 10% to 11%, which is explainable by run to run variance. Its just a flat out lie by AMD.It is, those 17% were for nT, not 1T like the Z3 vs Z4 slide.
In all fairness, I don't think anyone things that an OEM's presentation represents the best way to determine performance improvements.
We all pretty much believe they have slanted their picks .... which makes perfect sense for them to do