Cinebench isn't best case. I can tell because they literally say they got 15% in specint2006 rate, so cinebench cannot be a best case.
Cinebench is a fairly reliable, well scaling with cores, and quick to do benchmark. Perfect for showing off multicore devices on a stage.
They model things depending on simulations of workloads. If their suite of workloads that they predict will be commonplace performs better with the 5% faster single thread than two extra cores, then they'll make that choice. The 28 core number on Skylake-X was very carefully chosen.
I never said the rest of the system isn't pushed too. There's a balance to strike that AMD and Intel work very hard on figuring out, modeling workloads years in advance, and bet billions on it being the right one. There isn't a correct one answer, but there is a close enough answer for the...
You need single threaded performance to keep increasing together with multi core, there's always going to be inherently serial work that needs to be done, I don't even know why this is debated. No sane microprocessor engineer will tell you that you don't need to keep pushing single threaded...
Amdahls law is far too misused in these discussions. Yes more cores all else being equal does pleatu. But that's never the case. You always increase resources in conjunction with those cores.
It's important to note that using SMT to fill the core in absence of a powerful enough OoO engine to fill the execution pipeline with a single thread is not necessarily a bad thing. It's a conscious trade off, and a very fine balancing point for Intel for years now, as well as AMD with Zen...
It's not really a story of AMD vs Intel in the nanometer war, though obviously it's the most direct comparison we see. Who really outdid Intel was TSMC, through a combination of reasonable and flexible goals on the side of TSMC, and outlandish ones from Intel, on top of not having any back up...
There is nothing tying Polaris or Vega to any specific memory controller. AMD designs GPU's in modular blocks, and the memory controller is just another block that can be mixed and matched. For example Fiji was basically just Tonga scaled up with HBM. Same architecture.
As for Vega 11, it...
They know within a certain range with high certainty what they'll hit. The final frequencies are only nailed down quite late in development.
As for the rest, they're simply keeping more for later. This isn't a launch, you aren't going to get all the information in one go.
Depends on Threadripper volumes.
If for example they sell a lot of TRs, the cost savings by having more dies per wafer could tip over the balance Vs taking defective dies. That's why Intel tends to make a lot of small consumer dies (8c/6c/4c/2c are all different), because at their volumes it...
Had an amusing thought. If the I/O die really has a bunch of L4 cache, and they scale it between EPYC/Threadripper/AM4, that would mean Threadripper should have more L4 than AM4.
That would allow some games on Threadripper to outperform their AM4 counterparts core for core, clock for clock...
Bandwidth needs is just as much down to architecture as core counts. Saying dual channel not being able to feed 16 cores because the previous gen fed 8 cores isn't really an argument. Rome is 16c per dual channel lol
That said, I don't expect price per core to drop significantly with Ryzen...
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