Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

dullard · Feb 27, 2024

Markfw said:
This is the real problem......

Is it? Enthusiasts and power users can get their cutting edge products. Businesses and home users who just need a way to type in Word or access the internet can get cheap products.

igor_kavinski · Feb 27, 2024

dullard said:
Businesses and home users who just need a way to type in Word or access the internet can get cheap products.

Are they really cheaper in the long run, with higher power consumption and heat output?

dullard · Feb 27, 2024

igor_kavinski said:
Are they really cheaper in the long run, with higher power consumption and heat output?

All but one Raptor Lake Refresh Intel Processor (formerly Pentium), i3, and i5 are 65 W or less at base. And that includes iGPU for these processors. Intel's i7 and i9 are massive on power consumption, but that isn't true down the line.

Only 4 Raptor Lake Refresh chips (5 if you count a China only chip) have turbo powers over 181 W.

SiliconFly · Feb 27, 2024

dullard said:
...while Raptor Lake keeps getting produced again and again.

Markfw said:
This is the real problem......

Don't worry. From this year onwards, Arrow Lake will keep getting refreshed again and again.

ondma · Feb 27, 2024

igor_kavinski said:
Are they really cheaper in the long run, with higher power consumption and heat output?

Business and home users are not going to be using programs that use a lot of power anyway. With the lower operating frequencies and light loads, power consumption would be a minor factor, I should think.

Hulk · Feb 27, 2024

coercitiv said:
The leak we had from Intel's internal estimates (via Igor's Lab) was for a 8+16 die, I don't expect any 8+24 or 8+32 config to come this year.

While ARL has to compete with Zen 5 it also has to compete with the 14900K, and that part has set a high bar in raw performance at the cost of efficiency. But even taking that reality into account Intel can't release a part that performs worse than the 14900K and say, "Yes, but it's more efficient." So that leaves them with the need to surpass the 14900K with both lower clocks and the disaggregated latency penalty. I'm assuming Intel 4 won't be hitting 6GHz with ARL. If HT being removed is true the task becomes even more difficult in MT.

If the 15900K beats the 14900K in MT without HT then we would have to see a combination of the following to be true I would think.
1. Lion Cove and Skymont are going to show a significant IPC advantage over Raptor Lake counterparts. Like 20% or more when you consider the obstacles I noted above.
2. Clocks are going to be near Raptor Lake levels.

Truth be told, if the 15900K can equal 14900K overall performance with the same number of cores I will be mildly impressed. I have a suspicion that the tiled approach along with the insane clocks of Intel 7 are problematic.

dullard · Feb 27, 2024

Hulk said:
While ARL has to compete with Zen 5 it also has to compete with the 14900K, and that part has set a high bar in raw performance at the cost of efficiency.

I believe what @coercitiv was referring to this leak: https://videocardz.com/newz/intels-...thread-performance-gain-leaked-slide-suggests
That leak claims a 5% single-thread and 15% multi-thread gain for Arrow Lake. So, if (with leaks it is always an IF) the leak is correct, then Intel is attempting to meet and exceed that high bar.

igor_kavinski · Feb 27, 2024

ondma said:
Business and home users are not going to be using programs that use a lot of power anyway.

They don't have to use many programs like that. Just the browser with heavy websites can cause serious CPU spikes and it gets worse if those are their favorite sites they spend most of their time on. I have no data to prove my claim though.

igor_kavinski · Feb 27, 2024

dullard said:
That leak claims a 5% single-thread and 15% multi-thread gain for Arrow Lake. So, if (with leaks it is always an IF) the leak is correct, then Intel is attempting to meet and exceed that high bar.

If that does turn out to be true, it means Intel is hoping that once they manage a minor perf increase over their fastest monolithic die CPU, they can iterate on that and keep making the performance gap wider with successive refreshes or generations. But if they fail...

Hulk · Feb 27, 2024

dullard said:
I believe what @coercitiv was referring to this leak: https://videocardz.com/newz/intels-...thread-performance-gain-leaked-slide-suggests
That leak claims a 5% single-thread and 15% multi-thread gain for Arrow Lake. So, if (with leaks it is always an IF) the leak is correct, then Intel is attempting to meet and exceed that high bar.

Got it.

I still think 5% over Raptor Cove in performance meaning 15% increase at ISO frequency from Raptor Cove to Lion Cove due to decrease in clocks and tiles, which kind of makes sense.

15% MT seems to imply bigger gains for Skymont vs. Gracemont. Or more E clusters.

DavidC1 · Feb 27, 2024

Hulk said:
15% MT seems to imply bigger gains for Skymont vs. Gracemont. Or more E clusters.

Especially if Arrowlake doesn't come with Hyperthreading. Also 20% is entirely plausible when decode goes from 6 to 8 and previous two major Intel uarchs resulted in roughly that.

And the performance figure is with 8+16 according to that slide.

Hulk · Feb 27, 2024

DavidC1 said:
Especially if Arrowlake doesn't come with Hyperthreading. Also 20% is entirely plausible when decode goes from 6 to 8 and previous two major Intel uarchs resulted in roughly that.

And the performance figure is with 8+16 according to that slide.

Are you referring to 20% IPC increase for Lion Cove or Skymont?

Raptor Cove is currently 5+1 decode and 12 execution ports while Gracemont is 2x3 decode and 17 execution. To get the standard ~20 IPC Intel generational improvement (actual generations) they would probably need to go 6 to 8 decode as you mentioned.

That should give them 17% or so given the tile latency for the CPU tile.

Okay, so let's build a theoretical 8+16 ARL and use CB R23 for performance metrics.

Assumptions:
P core single core frequency, 5.6GHz, nC, 5.4GHz - No Hyperthreading, IPC +17% over Raptor Cove

E core frequency, 4.3GHz, +20% IPC over Gracemont

CB R23 ST - 2550
CB R23 MT - 41550, ~21900 E's, 19600 P's

I can see Lion Cove meeting those numbers but I'm having a hard time wrapping my head around +20% IPC for Skymont over Gracemont, which would be required to barely beat Raptor Lake MT performance much less improve on it by 15%.

Even a 10 or 12% MT increase in CB for Raptor Cove assuming P core specs as indicated above would require E's to be at 4.5GHz (doable) but IPC uplift over Gracemont at 30% (seems unreasonable).

DavidC1 · Feb 28, 2024

Hulk said:
Are you referring to 20% IPC increase for Lion Cove or Skymont?

Raptor Cove is currently 5+1 decode and 12 execution ports while Gracemont is 2x3 decode and 17 execution. To get the standard ~20 IPC Intel generational improvement (actual generations) they would probably need to go 6 to 8 decode as you mentioned.

....

Even a 10 or 12% MT increase in CB for Raptor Cove assuming P core specs as indicated above would require E's to be at 4.5GHz (doable) but IPC uplift over Gracemont at 30% (seems unreasonable).

Both, but if anything Skymont will be greater.

The Golden Cove core is not 5+1 but 6. They don't have the "complex" decoder anymore as the "simple" decoders can handle even more instructions without going through the 1 decoder.

They didn't need to greatly increase decoders to get 20% improvement in neither Sunny nor Golden. Actually Intel claimed 1+4 back with Sunny Cove. And they stayed at 4-wide all the way from Conroe/Merom to Skylake.

But, we're seeing a substantial increase in both decode and ROBs, meaning it's a brute force increase, but a big increase.

Crestmont is already noticeably faster with the ~2% from Raptorlake and 4-6% from Crestmont. In Skymont we're going to see a 3x3 decoder with 20+ ports. Considering how every major E core iteration was 30%, it would be pretty disappointing if it wasn't another 30% over Crestmont.

mikk · Feb 28, 2024

Intels Atom tock are usually over 20% IPC improvement. With a Gracemont like improvement they can reach Golden Cove. Maybe not in all workloads but in many it could, like Cinebench.

Cinebench R15 ST

i5-12500 @2.4 Ghz (Golden Cove) 135
N100 @2.4 Ghz (Gracemont) ~110
i7-7700K @2.4 Ghz (Skylake) 105
i3-4000M 2.4 Ghz (Haswell) 95
N6005 @2.4 Ghz (Tremont) ~90
i3-3110M 2.4 Ghz (Ivy Bridge) 85
N4100 2.4 Ghz (Goldmont Plus) 70
Q6600 2.4 Ghz (Nehalem) 63
N3350 2.4 Ghz (Goldmont) 48
N3700 2.4 Ghz (Airmont) 39
J1900 2.4 Ghz (Silvermont) 38

AMDK11 · Feb 28, 2024

DavidC1 said:
Both, but if anything Skymont will be greater.

The Golden Cove core is not 5+1 but 6. They don't have the "complex" decoder anymore as the "simple" decoders can handle even more instructions without going through the 1 decoder.

They didn't need to greatly increase decoders to get 20% improvement in neither Sunny nor Golden. Actually Intel claimed 1+4 back with Sunny Cove. And they stayed at 4-wide all the way from Conroe/Merom to Skylake.

But, we're seeing a substantial increase in both decode and ROBs, meaning it's a brute force increase, but a big increase.

Crestmont is already noticeably faster with the ~2% from Raptorlake and 4-6% from Crestmont. In Skymont we're going to see a 3x3 decoder with 20+ ports. Considering how every major E core iteration was 30%, it would be pretty disappointing if it wasn't another 30% over Crestmont.

SunnyCove Decode 1+3

Intel itself emphasizes that GoldenCove is a transition from a 4-way(CypressCove) to a 6-way decoder.

https://images.anandtech.com/doci/16881/40.jpg

DavidC1 · Feb 28, 2024

AMDK11 said:
SunnyCove Decode 1+3

Intel itself emphasizes that GoldenCove is a transition from a 4-way(CypressCove) to a 6-way decoder.

https://images.anandtech.com/doci/16881/40.jpg

Where were you 8 years ago? Now they claim that, but back then they said 1+4 for Sunny Cove.

I cache to decode = 5 uops.

They said that even for Skylake:

The L1 instruction cache is still a 32 KiB 8-way design, and there are still five decoders in play. These decoders are split as one complex decoder and four simple decoders, and they can supply up to five micro-ops per cycle.

So according to Intel
Skylake: 1+4
Sunny Cove: 1+4

DavidC1 · Feb 28, 2024

mikk said:
Intels Atom tock are usually over 20% IPC improvement. With a Gracemont like improvement they can reach Golden Cove. Maybe not in all workloads but in many it could, like Cinebench.

Cinebench R15 ST

i5-12500 @2.4 Ghz (Golden Cove) 135
N100 @2.4 Ghz (Gracemont) ~110
i7-7700K @2.4 Ghz (Skylake) 105
i3-4000M 2.4 Ghz (Haswell) 95
N6005 @2.4 Ghz (Tremont) ~90
i3-3110M 2.4 Ghz (Ivy Bridge) 85
N4100 2.4 Ghz (Goldmont Plus) 70
Q6600 2.4 Ghz (Nehalem) 63
N3350 2.4 Ghz (Goldmont) 48
N3700 2.4 Ghz (Airmont) 39
J1900 2.4 Ghz (Silvermont) 38

They are all 30%.

Intel Apollo Lake SoCs provide 30pc perf boost over Braswell

Intel showed off a few slides with comparative numbers at Computex.

hexus.net

Tremont: https://en.wikichip.org/wiki/intel/microarchitectures/tremont
32%

N100 vs N6000 vs N5030(3.4/3.3/3.1):

Processor Comparison - Head 2 Head

Intel Pentium Silver N5030 vs Intel Pentium Silver N6000 vs Intel Processor N100 - Benchmarks, Tests and Comparisons

www.notebookcheck.net

It shows Alderlake-N being consistent ~2x fast in multiple Cinebench versions, x264 Pass 1, and Geekbench, web browser micro benches and even in 3DMark CPU. It's been 30% PPC gains with ~10% clock on top for a roughly 50% gain every generation. They don't say it publicly but 30% may be their internal goal.

Fanlesstech talking about 31% gains for Goldmont Plus:

Page 191 - The Intel Atom Thread

Page 191 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

forums.anandtech.com

Golden Cove was ~40% over Skylake with 18% in Sunny and 19% in Golden. To reach Golden Cove it requires 40% gain, which would be possible with 2+4-6% from Crestmont, and 30% on top of that.

Just like how the claims of Gracemont being equal to Skylake consists of few % faster in Integer and quite a bit behind in FP, to live up to the historical trend, "Golden equivalent" would require being few % faster in Integer and behind in FP.

Hulk · Feb 28, 2024

DavidC1 said:
Both, but if anything Skymont will be greater.

The Golden Cove core is not 5+1 but 6. They don't have the "complex" decoder anymore as the "simple" decoders can handle even more instructions without going through the 1 decoder.

They didn't need to greatly increase decoders to get 20% improvement in neither Sunny nor Golden. Actually Intel claimed 1+4 back with Sunny Cove. And they stayed at 4-wide all the way from Conroe/Merom to Skylake.

But, we're seeing a substantial increase in both decode and ROBs, meaning it's a brute force increase, but a big increase.

Crestmont is already noticeably faster with the ~2% from Raptorlake and 4-6% from Crestmont. In Skymont we're going to see a 3x3 decoder with 20+ ports. Considering how every major E core iteration was 30%, it would be pretty disappointing if it wasn't another 30% over Crestmont.

I don't know how I missed the fact that Golden/Raptor Cove is not 5+1 but actually 6 simple decoders. Thanks. The Anandtech article didn't have a definitive answer so I guess I assumed 5+1.

The 20% IPC improvement from Skylake to Golden Cove was the result of an additional decoder, 4 additional ports, and a host of other logic changes. It was a significant overhaul. I have to admit I would be surprised if Intel could gain another 20% with the addition of 1 decoder simply because with every evolution of the core there is less "low hanging fruit" as Anand used to say. I should rephrase that and say I would be "happily" surprised.

I am not doubting you but where did you read 3x3 for the Skymont front end? Do we have any reviews that were able to isolate Meteor Lake Crestmont performance iso frequency vs Gracemont or are you quoting Intel for that 4 to 6% increase?

Meteor Lake reviews have been sketchy in my opinion,and I still don't have a good idea of how Redwood Cove and Crestmont in tiled form compare at iso-frequency to Raptor Cove and Gracemont?

DavidC1 · Feb 28, 2024

Hulk said:
The 20% IPC improvement from Skylake to Golden Cove was the result of an additional decoder, 4 additional ports, and a host of other logic changes. It was a significant overhaul. I have to admit I would be surprised if Intel could gain another 20% with the addition of 1 decoder simply because with every evolution of the core there is less "low hanging fruit" as Anand used to say. I should rephrase that and say I would be "happily" surprised.

They used to say "low hanging fruit" since the early 90's, with some being surprised at the original Athlon. It is harder, but it's still there. Apple's achievements show they got lot more to go. In fact, Apple has lot to go if history is an indicator.

They aren't adding 1 more decoder with Lion Cove. They are adding 2, plus increasing reorder buffer by almost 50%, both of which are unprecedented. That's why I am saying even 20% would be a disappointment, especially if we get a clock decrease. I'd expect 30% PPC gain with 10% decrease in clocks. I hope they cut a pipeline stage or two, or at least just one back in line with Sunny/Willow which will afford them 2-4% gain just on that.

The tech community has been in denial over Apple advances for many years until they got one out on the desktop with M1. The introduction of the iPhone in 2007 along with custom cores made Intel's achievements like Conroe/Merom and Sandy Bridge bloated.

Hulk said:
I am not doubting you but where did you read 3x3 for the Skymont front end? Do we have any reviews that were able to isolate Meteor Lake Crestmont performance iso frequency vs Gracemont or are you quoting Intel for that 4 to 6% increase?

Meteor Lake reviews have been sketchy in my opinion,and I still don't have a good idea of how Redwood Cove and Crestmont in tiled form compare at iso-frequency to Raptor Cove and Gracemont?

I am quoting Intel for those numbers as they've been quite accurate don't you agree?

But one Chinese test showed even greater 7% just from Crestmont. It seems Redwood Cove's changes are nowhere enough to make up for the losses from the new tile setup though. And Intel didn't claim performance gains for RWC nor Raptor Cove.

Hulk · Feb 28, 2024

DavidC1 said:
I am quoting Intel for those numbers as they've been quite accurate don't you agree?

But one Chinese test showed even greater 7% just from Crestmont. It seems Redwood Cove's changes are nowhere enough to make up for the losses from the new tile setup though. And Intel didn't claim performance gains for RWC nor Raptor Cove.

Yes I do agree with Intel's 4-6% for Crestmont but it's always nice to see independent testing corroborate claims.

The problem I have with this claim is we don't know if that is the claim for the isolated core or the tiled core. The only IPC "throughput" comparison I have for Meteor Lake vs Raptor Lake seems to suggest a decrease in ISO-Frequency performance for both Redwood Cove and Crestmont, which is why I was looking for independent testing.

Intel's Meteor Lake CPUs are slower at single-core work than previous-gen models — new benchmarks show IPC regressions vs Raptor Lake

Probably not what Intel wanted.

www.tomshardware.com

As for Apple, they have done an amazing job with their CPU's, no doubt. But I wonder if their closed architecture allows them to better optimize hardware to software?

AMDK11 · Feb 28, 2024

DavidC1 said:
Where were you 8 years ago? Now they claim that, but back then they said 1+4 for Sunny Cove.

I cache to decode = 5 uops.

They said that even for Skylake:

So according to Intel
Skylake: 1+4
Sunny Cove: 1+4

https://www.servethehome.com/wp-content/uploads/2017/07/Intel-Skylake-SP-Microarchitecture-Changes.jpg

Skylake has a 1 complex + 3 Simple decoder, which with fusion is able to transmit 5 uops.

According to Agner Fog tests, the Skalake core executes a maximum of 4 instructions, not 5 as everyone interpreted the Intel slide. The slide shows a 4-channel decoder.
Nothing has changed in SunnyCove regarding the decoder, because Intel would have mentioned it.

As if that wasn't enough, Intel clearly confirms in the GoldenCove slides that this is a move from 4-way to 6-way decoding. This additionally confirms that the SunnyCove decoder is 4-way, just like in Skylake.

Where was I 8 years ago? Sensitive topic I have been sensitive to these topics for 24 years.

DavidC1 · Feb 28, 2024

Hulk said:
As for Apple, they have done an amazing job with their CPU's, no doubt. But I wonder if their closed architecture allows them to better optimize hardware to software?

Sorry, but this is another excuse.

Apple did better because they had better teams, plain and simple. As soon as Gerald Williams III left the company, their advances stalled to the level of Intel in 2016-2020. Nuvia architecture is worked on by Gerald too.

A twitter post by someone close to him gave an example of Gerald's relentless focus on perfection, that he made his wife's wedding dress and how it stunned everyone. All "tech" comes from the innovation, creativity and perseverance of the people that work on them. Hence why patent battles over a shell company with zero employees are silly to say the least.

Also for Apple it wasn't just Gerald. They acquired the former PA Semi team consisting of mostly former DEC Alpha designers(including Jim Keller) known for their legendary CPU architectures. People talk about Keller as being some sort of a semiconductor God, well imagine a group of people like him.

Intel had long-standing problems within the company preventing such geniuses from doing proper work. One might simply call it "bureaucracy".

The problem I have with this claim is we don't know if that is the claim for the isolated core or the tiled core. The only IPC "throughput" comparison I have for Meteor Lake vs Raptor Lake seems to suggest a decrease in ISO-Frequency performance for both Redwood Cove and Crestmont, which is why I was looking for independent testing.

Even those tests show 4-5% gains for Crestmont. Meteorlake is further complicated by the lack of testing and supposed firmware issue.

I don't know for sure if the problem is inherent to the tile setup or is a problem with the implementation. When a project runs into trouble, the team misses their targets. Surely if everything went well, we wouldn't have seen the few % degradations. Meteorlake was in design couple of years before Raptorlake, while being a year late, which gives you an idea of the problems they were having. Raptorlake was very well executed.

inf64 · Feb 28, 2024

With imminent launch of 14900KS, which has around 5-6% higher ST boost versus 13900K, I wonder how will Arrow Lake do against this SKU. Igor's lab and other leak (slide) pointed to ~5% ST increase versus 13900K. If that is still true, then Arrow Lake will have a hard time beating 14900KS in ST tasks.

edit: my bad, I checked the Igor's lab leak and it was normalized to 13900K. Geomean of ST should be ~12% versus 13900K, which should still put arrow Lake at 5-6% faster than 14900KS. So the projection is still valid I guess.

Geddagod · Feb 28, 2024

DavidC1 said:
They aren't adding 1 more decoder with Lion Cove. They are adding 2, plus increasing reorder buffer by almost 50%, both of which are unprecedented

You get diminishing returns just adding more decoders, and SNC increased the ROB by nearly 60%. GLC is just shy of a 50% improvement.

I'd expect 30% PPC gain with 10% decrease in clocks.

I believe Intel gets a ~10% decrease in clocks for every ~20% IPC increase.

DavidC1 said:
The introduction of the iPhone in 2007 along with custom cores made Intel's achievements like Conroe/Merom and Sandy Bridge bloated.

bro what lol

Hulk · Feb 28, 2024

DavidC1 said:
Sorry, but this is another excuse.

Apple did better because they had better teams, plain and simple. As soon as Gerald Williams III left the company, their advances stalled to the level of Intel in 2016-2020. Nuvia architecture is worked on by Gerald too.

A twitter post by someone close to him gave an example of Gerald's relentless focus on perfection, that he made his wife's wedding dress and how it stunned everyone. All "tech" comes from the innovation, creativity and perseverance of the people that work on them. Hence why patent battles over a shell company with zero employees are silly to say the least.

Also for Apple it wasn't just Gerald. They acquired the former PA Semi team consisting of mostly former DEC Alpha designers(including Jim Keller) known for their legendary CPU architectures. People talk about Keller as being some sort of a semiconductor God, well imagine a group of people like him.

Intel had long-standing problems within the company preventing such geniuses from doing proper work. One might simply call it "bureaucracy".

Even those tests show 4-5% gains for Crestmont. Meteorlake is further complicated by the lack of testing and supposed firmware issue.

I don't know for sure if the problem is inherent to the tile setup or is a problem with the implementation. When a project runs into trouble, the team misses their targets. Surely if everything went well, we wouldn't have seen the few % degradations. Meteorlake was in design couple of years before Raptorlake, while being a year late, which gives you an idea of the problems they were having. Raptorlake was very well executed.

I wasn't making excuses for Intel, just wondering if their closed system architecture gives them a bit of an advantage coordinating hardware and software? An excuse would have been if I'd written, "Yeah but Apple is a closed infrastructure while x86 is open and that makes a HUGE difference!"

That being said I get it. A great team at Apple is producing great products.

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