Eh?Had to google that. Chinese Epyc. I suppose it's castrated?
Xiaolong is the chinese name for EPYC not Hygon-related. Hygon switched to RISC-V after:Eh?
I thought AMD shuttered their Dhyana joint venture after the trade sanctions ramped up?
In a normal situation, after bonding you'll have packaging finishing, testing & binning, delivery. These steps should not take a lot of time. But, when launching a product, normally you want to execute a ramp up of the capacity, and an inventory building. And you'll need to launch the BIOSes for the hardware support on the motherboards' side. So it depends mostly on these factors.So how long do we usually see from bonding to consumer available?
Official public support of Vermeer on AM4 arrived ~month prior its launch IIRC. There surely are dev platforms with dev BIOSes supporting Zen 5.you'll need to launch the BIOSes for the hardware support on the motherboards' side.
“iso” is a greek prefix that means “equal”. Isonomic, isometric, etc.ISO is the international standards office so iso clocks or iso node or iso power is just short hand for standardising the given parameter.
But he is right ISO is International Organization for Standards https://www.iso.org/home.html“iso” is a greek prefix that means “equal”. Isonomic, isometric, etc.
Why give it a different name? Do Intel Core or Xeon CPUs sell in China with a different name too? I'm guessing Xiaolong may have dedicated instructions to accelerate their domestic encryption standards.Xiaolong is the chinese name for EPYC not Hygon-related.
It's not a different name, just the name in Chinese writing. Fun fact: The Chinese name for AMD translates into "Super Micro" which considering there's a company actually called "Super Micro" isn't helpful while machine translating.Why give it a different name?
You mean this?It's not a different name, just the name in Chinese writing. Fun fact: The Chinese name for AMD translates into "Super Micro" which considering there's a company actually called "Super Micro" isn't helpful while machine translating.
Haha, so salty....Must be nice for folks to be able to order their Zen 5 CPUs in April, with an awesome 32% IPC bump. Too bad for the clock regression and the 999USD price point for top end. It s just a few weeks before the reviews hit your favorite YTer.
No?AMD is preparing to scale core counts from 8 to 16 (Zen 6)
That's server.32 cores (Zen 6C).
You're interested in Venice-E?That's why I am more interested on upcoming Zen6C with 32-core
Do you have GeekBench or Cinebench ST scores?No?
That's server.
You're interested in Venice-E?
That's definitely out of your budget and niche.
Server procurement people tend to care about SPEC first and anything beyond that as requested.Do you have GeekBench or Cinebench ST scores?
Points per watt for ST results is not valid as we cannot take the total TDP when calculating that metric. ST power draw is very different for all those CPUs.Guys, I think I know how the discrepancy between the points of Zen 5 coming from:- Based on leaks from RGT, I know but please bear with me:-
View attachment 94901
- ST performance of Zen5 range from 12-20% better than Zen4.
- MT performance of Zen 5 range from 12-25% better than Zen4, slightly better compared to ST.
- Surprising, GeekBench 6.2 MT's score is scaling much better than CineBench.
- We don't know final clock speed of Zen5, but the 3500 GeekBench points should be good indicators of final silicon. Then where the 40% improvement coming from?
TDP != power.It's not even valid for MT benchmarks.
a) Not all MT benchmarks are power-bound. That is, power use ≠ power limit.
b) TDP is only one power limit among several, and in case of desktop CPUs, about the least relevant one.
TDP != power.
nT performance is almost always limited by some combination of architecture/power/thermals (the TDP thing you mentioned)
If a piece of software isn’t utilizing 100% of CPU, it is waiting on something else or isn’t designed to use 100% (example: system services) and usually makes a poor benchmark.
nT performance is almost always limited by some combination of architecture/power/thermals (the TDP thing you mentioned)
If a piece of software isn’t utilizing 100% of CPU, it is waiting on something else or isn’t designed to use 100% (example: system services) and usually makes a poor benchmark.
Or anything javascript which is a branch prediction competition first and foremost.Or it could involve a lot of pointer chasing, and so spends most of execution time waiting on memory latency, which is a reasonable way for a benchmark to act because this describes a lot of important software. (Think all business software written in Java and that take enough memory to not fit the hot set in cache.)
Andrei did.Recording joules per workload would solve so many of these issues, but alas still nobody bothers doing benchmarks like that.