Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Page 284 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

Tigerick

Senior member
Apr 1, 2022
679
559
106






As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Arrow Lake Refresh (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXDesktop OnlyMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025
Q4 2025 ?Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E8P + 32E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ??8 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

Attachments

  • PantherLake.png
    283.5 KB · Views: 23,969
  • LNL.png
    881.8 KB · Views: 25,441
Last edited:

SpudLobby

Senior member
May 18, 2022
660
407
106
You can't compare nodes based on their products. Thats foundry 101.
Oh I agree with that, I’m not talking about comparing nodes. I’m talking about comparing products with the reasoned premise they have similar manufacturing technology underpinning the transistors, similar market targets, and even similar area overhead.

With Lunar Lake vs the M3 that’s pretty perfect.

With Lunar Lake vs the M1 or M2, or X Elite, it’s funny, because the advantage is for Lunar Lake on a node basis.
 

Hitman928

Diamond Member
Apr 15, 2012
5,392
8,278
136
You can't compare nodes based on their products. Thats foundry 101.

You can compare nodes based on their products only if both are exact same (even the libraries have to be very similar). Otherwise it makes no sense.

The way I read it, @SpudLobby is saying the opposite. He's saying that now that Intel products will have node parity (the most advanced node available), any shortcoming in the product will be on the design alone and they can't blame a node deficiency as a reason for any shortcomings.
 

SiliconFly

Golden Member
Mar 10, 2023
1,062
548
96
The way I read it, @SpudLobby is saying the opposite. He's saying that now that Intel products will have node parity (the most advanced node available), any shortcoming in the product will be on the design alone and they can't blame a node deficiency as a reason for any shortcomings.
Yep. No more blame game. And hopefully, no more shortcomings too. LNC is supposed to fix that.

Like I mentioned a while ago, Q3 2024 is the first time Intel Core is ditching all archaic stuff (like Intel 7/4, RWC, Gracemont, etc), in favor of cutting edge stuff (like 20A, N3B, LNC, Skymont, etc). A lot is riding on LNC. And I think it's gonna deliver after all.

The coming months are gonna be very interesting.
 

Hans Gruber

Platinum Member
Dec 23, 2006
2,153
1,099
136
Yep. No more blame game. And hopefully, no more shortcomings too. LNC is supposed to fix that.

Like I mentioned a while ago, Q3 2024 is the first time Intel Core is ditching all archaic stuff (like Intel 7/4, RWC, Gracemont, etc), in favor of cutting edge stuff (like 20A, N3B, LNC, Skymont, etc). A lot is riding on LNC. And I think it's gonna deliver after all.

The coming months are gonna be very interesting.
There is a lot of Intel bashing on this forum. I agree with naysayers about the fake generations that Intel has released in the last few years. Arrow Lake is a legit new node on a new process 20A. Going from 10nm down to 5nm (20A). AMD has a problem with not being on TSMC 3nm for the efficiency gains out of the gate. N4 (4nm) is a good clip better than N5 but at least 10% less efficient than N3 (3nm).

Intel said awhile back they would gain market leadership (beyond node parity) with 18A and they were comparing 18A to TSMC 2nm which is not even in production yet. Intel also said that 18A would have 10% better efficiency than 20A. It would seem that Intel is basing their performance numbers more on a performance boost rather than efficiency gains. TSMC is very power efficient when you get to 3nm but the performance uplift isn't there. I would argue the performance uplift 7nm (TSMC) provided has not been seen on 5nm or 3nm. The efficiency gains are substantial but probably not worth the price premium TSMC has been charging their customers.

Intel said they are dropping hyperthreading from Arrow Lake. They said their efficiency cores would more than offset the performance gains that hyperthreading provides. Implying hyperthreading technology is old and outdated. Since Zen 5 Ryzen processors will first appear on 4nm. Intel and AMD are at node/silicon parity with Zen 5 and Arrow Lake.
 

DavidC1

Senior member
Dec 29, 2023
202
281
96
You need to take these tests with a grain of salt, though. The VideoPlayback one is basically local playback and can be chalked up to the Compute Tile being deactivated while only the Media Engine, Display Unit and LPE cores being active.
....
I do prefer Geekerwan test bench.
Anandtech reviews are in the toilet. That's why we go to OTHER sites for reviews but come to this forum to talk about it.

The lack of quality control on the latest review comparable to $1 Chinese ebay stuff definitely doesn't help.
 

DAPUNISHER

Super Moderator CPU Forum Mod and Elite Member
Super Moderator
Aug 22, 2001
28,662
21,165
146
There is a lot of Intel bashing on this forum.
Let me clarify a few things:

If you see someone doing it in an Intel thread, report it.

Taking IHVs to task in threads devoted to the subject is allowed Example: the UE games crashing thread. As is some mild trash talk about the competition in that brand's threads. Example: Comparing here in this very thread the faster boot times on Intel vs AM5. Pointing out how fussy AM5 can be about memory compared to Intel. That kind of stuff. If AMD users don't like reading it, they should stay out of Intel threads, and vice versa. Coming in here to start beef about the statements/claims is not permitted.

Going into a thread about a brand, Example: this very Intel thread, and bashing Intel is forbidden. As is trying to deflect, obfuscate, gaslight, or astroturf in order to derail the thread and/or upset Intel users.

I hope this clears up any confusion concerning the forum policies. Intel users should feel like Intel threads are a safe space for them to discuss the company and their products without getting harangued by haters. Report violation. We are a small moderation team and miss stuff. We can't enforce the rules if we didn't see the violation.

- CPU mod DAPUNISHER
 

SiliconFly

Golden Member
Mar 10, 2023
1,062
548
96
Intel and AMD are at node/silicon parity with Zen 5 and Arrow Lake.
Thats not true anymore. For the first time in many years, Intel actually has the lead with Arrow Lake on advanced nodes 20A & N3B, whereas Zen5 is coming out on N4 first and on N3 only later I think (probably after 6 months? or 1 year? dunno when). That gives Intel the edge.

Tiles, advanced packaging, advanced nodes... they have it all. Afaik, the Core is the sole issue now.

Like I always say, for Intel everything now squarely boils down to the performance of LNC. If it tanks, Intel may not survive, considering many key future designs are also based on LNC and most importantly, how thin they're spread already. I mean it'll still survive in some form, but it won't be the Intel we know.

Going from 10nm down to 5nm (20A).
20A isn't 5nm. It's not equivalent to TSMC 5nm node.
 
Last edited:

Ghostsonplanets

Senior member
Mar 1, 2024
387
659
96
Zen5 is coming out on N4 first and on N3 only later I think
Turin Dense will use N3. Consumer Zen 5 will be fabbed on N4P only.

N3B doesn't improve much over N4P on most metrics, sans density, that we can say the node will make one product shine brighter than the other. Design and execution is key and will be showed with each product.

If Intel fumbles even with the usage of the latest and leading edge node, then it's an IDC issue. There will be no mother foundry to cover-up potential issues. And vice-versa.
 

Hans Gruber

Platinum Member
Dec 23, 2006
2,153
1,099
136
Thats not true anymore. For the first time in many years, Intel actually has the lead with Arrow Lake on advanced nodes 20A & N3B, whereas Zen5 is coming out on N4 first and on N3 only later I think (probably after 6 months? or 1 year? dunno when). That gives Intel the edge.

Tiles, advanced packaging, advanced nodes... they have it all. Afaik, the Core is the sole issue now.

Like I always say, for Intel everything now squarely boils down to the performance of LNC. If it tanks, Intel may not survive, considering many key future designs are also based on LNC and most importantly, how thin they're spread already. I mean it'll still survive in some form, but it won't be the Intel we know.


20A isn't 5nm. It's not equivalent to TSMC 5nm node.
I agree with some of what you are saying but I want to wait and see what Arrow Lake does on 20A. In other posts I said that AMD really needed to be on 3nm for the efficiency gains. N4 is called 4nm because it's enhanced 5nm silicon with better efficiency and performance gains. It's still not the best 4nm TSMC silicon but it's better than N5. I have been waiting to see what TDP Intel will use for Arrow Lake. I have read 125w for K series chips.

20A is 5nm silicon but Intel says their silicon is not the same as TSMC silicon. Intel says their 5nm silicon is equivalent to TSMC 3nm. 18A is supposed to be better than 2nm TSMC silicon and I think they call the 18A 1.8nm. Intel has changed their stance on what 20A and 18A are equivalent to over the last several years.

All of the people sitting on the sidelines have been waiting for 20A. A true node shrink with a new CPU architecture and not a fake new process. Alder Lake was the last real new Intel generation with a shrink from 14nm down to 10nm. That's why I expect a big performance gain with Arrow Lake in IPC and efficiency.

Here is an article from late 2021 talking about 20A and it being 5nm.
 

mikk

Diamond Member
May 15, 2012
4,152
2,164
136
Where have you heard about PCD??? I just heard from my source as explained above

This is what xino told last month about PTL and I trust him. That's why I asked you about the PCD tile you didn't mention.

Don't worry, my source is the one mentioned about 12 XE3 before. Time will tell if above info are correct...

I've heard the same, at least Sunny told PTL offers a 12 Xe core GPU. And I trust him as well.
 

Attachments

  • PTL.png
    61.4 KB · Views: 18

Hans Gruber

Platinum Member
Dec 23, 2006
2,153
1,099
136
Turin Dense will use N3. Consumer Zen 5 will be fabbed on N4P only.

N3B doesn't improve much over N4P on most metrics, sans density, that we can say the node will make one product shine brighter than the other. Design and execution is key and will be showed with each product.

If Intel fumbles even with the usage of the latest and leading edge node, then it's an IDC issue. There will be no mother foundry to cover-up potential issues. And vice-versa.
Turin will use N3 from Zen 5 release. That's going to do really well efficiency wise. N4P doesn't exist yet. N4 is significantly behind the performance metrics of N4P. Even Nvidia is staying on the 4nm TSMC silicon for Blackwell. Nvidia will use N4P for their enterprise stuff and use N4P or 4N silicon for the consumer cards. 4N is better performance and efficiency wise than N4.

As the third major enhancement of TSMC’s 5nm family, N4P will deliver an 11% performance boost over the original N5 technology and a 6% boost over N4. Compared to N5, N4P will also deliver a 22% improvement in power efficiency as well as a 6% improvement in transistor density. In addition, N4P lowers process complexity and improves wafer cycle time by reducing the number of masks. N4P demonstrates TSMC’s pursuit and investment in continuous improvement of our process technologies.

It would be nice if TSMC would publish their own performance numbers for all the processes on their nodes in an easy to read chart. Below is the best I have for performance metrics.
 
Last edited:

Tigerick

Senior member
Apr 1, 2022
679
559
106
This is what xino told last month about PTL and I trust him. That's why I asked you about the PCD tile you didn't mention.



I've heard the same, at least Sunny told PTL offers a 12 Xe core GPU. And I trust him as well.
Yeah, didn't know Xino leaked before. Never heard about PCD as well.

@DavidC1 Now I believe you can trust my source cause the rest of technical details are not easy to fool people if you think through. And Xino also mentioned three tiles, do you believe now?
 

Ghostsonplanets

Senior member
Mar 1, 2024
387
659
96
The fact the Compute Tile is coming back to Intel after the N3B is a good show of confidence towards i18A. So going external for the crown jewel (CPU) will be a one-off thing.

I've heard the same, at least Sunny told PTL offers a 12 Xe core GPU. And I trust him as well.
How many EUs would be 12 Xe? 192 EUs? So 1536 ALUs? Although Battlemage does change the internal structure? So maybe it's actually 2x that.
N4P doesn't exist yet
It does?
It would be nice if TSMC would publish their own performance numbers for all the processes on their nodes in an easy to read chart.
They always offer PPA advancements numbers over the past nodes. You can easily find it with a Google search. Even Anandtech themselves has a pretty up to date comparison charts.
 

Glo.

Diamond Member
Apr 25, 2015
5,727
4,606
136
The fact the Compute Tile is coming back to Intel after the N3B is a good show of confidence towards i18A. So going external for the crown jewel (CPU) will be a one-off thing.


How many EUs would be 12 Xe? 192 EUs? So 1536 ALUs? Although Battlemage does change the internal structure? So maybe it's actually 2x that.

It does?

They always offer PPA advancements numbers over the past nodes. You can easily find it with a Google search. Even Anandtech themselves has a pretty up to date comparison charts.
128 ALUs per Xe core.

8 Xe cores - 1024 ALUs.
12 Xe Cores - 1536 ALUs.
 

Hans Gruber

Platinum Member
Dec 23, 2006
2,153
1,099
136
20A is 20A, nothing more. 20A offers RibbonFET and BSPDN, which are far different from current FinFET nodes. Without technical details behind it, there's no point comparing it.
There is a point of reference. 10nm does not have the real estate that 5nm has for components and cores. It's an entirely new architecture on an entirely new core. The processor core advantage AMD had will be gone with Arrow Lake. The efficiency advantage is a big question. All the stereotypes about Intel processors being heaters or needing massive voltage to perform could be gone as well.

Nobody is comparing anything here. There are a lot of forum members here who do not realize the significance of 20A. Intel was on 14nm for more than 6 years. Alder Lake was the first 10nm Intel Processor. 20A will not be around for long. 18A is the process that will be around for a couple of years. 20A starts with some cutting edge technology that TSMC does not have.
 

SiliconFly

Golden Member
Mar 10, 2023
1,062
548
96
10nm does not have the real estate that 5nm has...
20A in not 5nm. Even both preceding nodes have better PPA than TSMC 5nm.

There are a lot of forum members here who do not realize the significance of 20A
Really? You think lot of people here don't understand? Apparently, you're the one who lacks understanding.

20A starts with some cutting edge technology that TSMC does not have.
Interesting. They're called GAAFETs & BSPD. And you still say 20A equivalent to TSMC 5nm.

I'll let you in on a very interesting piece of information. Intel does not have a 5nm node.
 
Reactions: spursindonesia

Philste

Member
Oct 13, 2023
70
131
66
How many EUs would be 12 Xe? 192 EUs? So 1536 ALUs? Although Battlemage does change the internal structure? So maybe it's actually 2x that.
PTL should be Celestial already, and we don't even know the changes of Battlemage officially. So there could be quite some changes about the meaning of 12 Xe Cores until then.
 

SiliconFly

Golden Member
Mar 10, 2023
1,062
548
96
Will Intel keep flip-flopping between TSMC and Intel Foundry? But I guess that make sense as
It's all about volume. 20A is not a high volume node. And 18A will need time to ramp up. They have no choice but to rely on TSMC for the foreseeable future.

...Intel themselves have said i18A would still be behind the industry best in some metrics.
Those are rumors. Intel never said that. According to them, when comparing 18A and N2, either of them have no "significant" advantage over one another. According to a slide leaked by Dr. Ian Cutress, 18A is expected to be slightly ahead of N2 in performance (Pat said the same). N2 I think is expected to be on par or slightly ahead of 18A in efficiency. Both are expected to have similar densities (and wafer cost too). In short, the PPA variations are negligible. But yield & volume are entirely different beasts. Only time can tell us, how well they ramp and what kinda volumes they can hit (the road ahead isn't rosy for intel foundry).
 
sale-70-410-exam    | Exam-200-125-pdf    | we-sale-70-410-exam    | hot-sale-70-410-exam    | Latest-exam-700-603-Dumps    | Dumps-98-363-exams-date    | Certs-200-125-date    | Dumps-300-075-exams-date    | hot-sale-book-C8010-726-book    | Hot-Sale-200-310-Exam    | Exam-Description-200-310-dumps?    | hot-sale-book-200-125-book    | Latest-Updated-300-209-Exam    | Dumps-210-260-exams-date    | Download-200-125-Exam-PDF    | Exam-Description-300-101-dumps    | Certs-300-101-date    | Hot-Sale-300-075-Exam    | Latest-exam-200-125-Dumps    | Exam-Description-200-125-dumps    | Latest-Updated-300-075-Exam    | hot-sale-book-210-260-book    | Dumps-200-901-exams-date    | Certs-200-901-date    | Latest-exam-1Z0-062-Dumps    | Hot-Sale-1Z0-062-Exam    | Certs-CSSLP-date    | 100%-Pass-70-383-Exams    | Latest-JN0-360-real-exam-questions    | 100%-Pass-4A0-100-Real-Exam-Questions    | Dumps-300-135-exams-date    | Passed-200-105-Tech-Exams    | Latest-Updated-200-310-Exam    | Download-300-070-Exam-PDF    | Hot-Sale-JN0-360-Exam    | 100%-Pass-JN0-360-Exams    | 100%-Pass-JN0-360-Real-Exam-Questions    | Dumps-JN0-360-exams-date    | Exam-Description-1Z0-876-dumps    | Latest-exam-1Z0-876-Dumps    | Dumps-HPE0-Y53-exams-date    | 2017-Latest-HPE0-Y53-Exam    | 100%-Pass-HPE0-Y53-Real-Exam-Questions    | Pass-4A0-100-Exam    | Latest-4A0-100-Questions    | Dumps-98-365-exams-date    | 2017-Latest-98-365-Exam    | 100%-Pass-VCS-254-Exams    | 2017-Latest-VCS-273-Exam    | Dumps-200-355-exams-date    | 2017-Latest-300-320-Exam    | Pass-300-101-Exam    | 100%-Pass-300-115-Exams    |
http://www.portvapes.co.uk/    | http://www.portvapes.co.uk/    |