Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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Mahboi

Senior member
Apr 4, 2024
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If I am understanding what is being discussed correctly, it is not a core at all - just like a filter on top of regular Zen 5 cores that can carry out a subset of instructions in a power efficient manner without waking up the full core.
It is a core. It's a gutted Zen 5 core where any parts that aren't strictly necessary for idle or low power usage are taken out.
The question is how much can actually be kept/what is considered "strictly necessary".
It's a big question too, because you could just as easily say "just the bare minimum for the OS to run services, show a video feed and take KB/mouse inputs and some basic text editor or browser" or add in playing music, decoding and playing a video feed, some extra perf on top of that...
It's going to be very difficult to decide what gets cut and what doesn't, knowing that you have to find a balance between your LP cores just being useless and waking up the big cores for everything, or your LP cores not cutting enough and generally being too big for their own good.

And yea it can wake one big core in case illegal instructions are sent to the LP core, if done seamlessly I'm only mildly worried about it...although that seemed to be a problem for MTL, where the cores get awoken all the time.
If this is the case, why would this be exclusive to Halo? Perhaps because Zen 5C doesn't really benefit?
Halo is the biggest part of the Z5 Strix lineup. Simple as that. It'll be expensive to buy, so they can afford to try things there and still run a profit. But Halo will probably turn out to be like what the 5800x3D was for AM4, a first run of an upcoming technology. They're using it as a first run for what's probably going to be commonplace on all Z6 mobile CPUs.
 

dhruvdh

Junior Member
Apr 2, 2024
12
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I call it a filter because it seems like it cannot operate independently and would need a core that supports the full instruction set next to it. something to grow like a tumor on. Or is this meant to support the full instruction set?
 

Abwx

Lifer
Apr 2, 2011
11,056
3,712
136
The cats were built by a tiny team, that managed to massively outpetform expectations.

The reason cat core development ended was not about the market, it was that someone (iirc Samsung? Not sure and I don't have time to check it) poached the entire team whole from AMD. This was before the Zen success and when AMD had money issues.
The reason was given by Rory Read at the time, it s because Intel was so in fear that AMD could capture the low power market that they started giving their Bay trails Atoms for free all while subsiding the OEMs, as stated by the AMD CEO there was nothing you could do with this, his formulae about this infamous and anti competitive scheme was "chips wrapped in $ bills", consequently AMD stopped developping those chips.
 

Mahboi

Senior member
Apr 4, 2024
522
836
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Zephyr small cores are located just beside Hurricane cores, like they're growing out of the big cores. Also, A10 b.l implementation was based on cluster migration were the P cores were the ones that did everything foreground. While the E cores handled idle, background, etc. But the key takeaway (imo) is this:

Emphasis on "custom designed performance controller to manage the CPU cores and migrate tasks between them"

This patent reminds me a lot of A10 Fusion, where the little cores ended up being almost transparent to software because if a workload was heavy enough it would transition from the little cores to the big cores, and primarily use those instead (not sure how that was determined by the OS/hardware, but I wouldn't be surprised if it relied upon the types of instructions run - like in that patent - or the workload duration).

A very hardware solution to the whole big.LITTLE scheduling problem. But Apple still ended up dropping it pretty quickly afterwards. It's why it was such a surprise to see AMD patent almost the same idea back then too.
Ok so the million dollar question: why did Apple give up on it immediately? Sounds like a pretty complete solution, but they gave up and went back to software scheduling anyway?
 

Mahboi

Senior member
Apr 4, 2024
522
836
91
Apple controls their own software stack. Microsoft cannot be trusted to make things work.
Aye but it seems like a hardware solution would be more final and complete and less taxing than a software one.
So if they bothered to go about it the hard way, why give up and then do it all in software again? Did they have latency problems, core awakening delays, or was there some reason to give up on what should be a final solution?
 

Ghostsonplanets

Senior member
Mar 1, 2024
387
659
96
Ok so the million dollar question: why did Apple give up on it immediately? Sounds like a pretty complete solution, but they gave up and went back to software scheduling anyway?
Cluster migration is expensive from a power standpoint. Unified scheduling from P to E cores also increases MT performance. Apple managed to stay with only 2P cores on the iPhone A series due to E cores being efficient while powerful enough to add performance on their own. Perks of controlling their own hardware and software stack.

x86 peers are looking at emulate this modern unified b.l approach to increase perf/mm². But while Apple E cores are powerful enough to do task while also being insanely efficient and being able to operate at very low power, x86 E/Dense cores can't match it. It's why a new tier of cores are introduced in the form of Low Power cores.

In a sense, current x86 approach resembles Arm tri-tier approach. Where there's X cores for absolute performance, A7 cores for good performance with area efficiency and A5 cores for low power/always aware tasks.
 

Ghostsonplanets

Senior member
Mar 1, 2024
387
659
96
"but PCs will also let users interact with AI every day. We’re witnessing a significant growth of local AI applications for both personal and business purposes. With this increase of local AI comes a higher demand for incorporating AI engines in client and end devices. We were the first company to bring AI to PCs over a year ago by integrating a dedicated neural processing unit (NPU) on an x86 processor. These dedicated AI engines handle local AI applications efficiently, offering better performance and battery life in popular devices like ultrathin laptops. We have exciting announcements at Computex this June."

Welp, Zen 5 at Computex confirmed. @adroc_thurston vindicated.
 

StefanR5R

Elite Member
Dec 10, 2016
5,591
8,013
136
"We’re witnessing a significant growth of local AI applications for both personal and business purposes."
MC: "Coming out of that meeting, I just wanted to close my eyes, go to sleep, and then wake up and buy this thing. I want to be in the future, this thing is awesome and it's going be so great - I can't wait for it."
So the one thing he looked forward to so much was... local inferencing?
;-)
 

Fjodor2001

Diamond Member
Feb 6, 2010
3,842
305
126
Welp, Zen 5 at Computex confirmed. @adroc_thurston vindicated.
In what way? He said Zen5 launch with absolute certainty should be in April, which did not happen. May 1 today, so it's now 100% confirmed he was incorrect.

Later when he said Zen5 should be announced at Computex, that info had already been out in the wild from others. So he was just re-iterating what others had said before.

The first rule of fight club/CPU forum is attack the post not the poster. It's the first rule not the first suggestion.

Mod DAPUNISHER
 
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Timorous

Golden Member
Oct 27, 2008
1,673
2,954
136
Ok, so what do we make of that.

Can the promised average 40-45%+ perf increase core-to-core for Zen5 DT turn out to be only 20-30%, and can the $999 9950X price turn out to be e.g. $799?

Performance is whatever, unless there is a huge miss again which given the existence of parts in the wild seems very unlikely.

Price can be decided last minute. PS4 price was decided just before they went on stage to announce it.
 
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