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  1. S

    Discussion Qualcomm Snapdragon Thread

    Interestingly, according to someone I talk to on an AV1 encoding discord the Google Tensor G3 cores support SVE2....
  2. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    ROCm/HIP is mostly tied to their CDNA accelerators. RDNA compatibility is mostly an after thought at the moment sadly.
  3. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    From what I can gather DLSS/framegen and denoising are always going to be a problem while RT remains a focus. Software techniques like ReSTIR can only do so much to mitigate the problem of computational complexity involved.
  4. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    Or alternative interests. I used to be mad into gaming as a kid, but these days I'm all played out and books, screen media and music are my jazz. Remaining hardware interest is more curiosity and possible (but unrealistic) aspirations of putting my bachelors degree to use on 3D environment...
  5. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    But Phenom (Agena/Phenom1's initial problems aside) was not - so why not just reboot Phenom, which IMHO was a decent brand name. Ehhhh..... Not to the extreme extent of FX, but arguable at the very least that it hasn't experienced serious problems in the past. HD 2xxx was an unmitigated...
  6. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    IMHO it's definitely a cultural and environmental thing, and one that I would argue is definitely shifting with the times - slower than with boys/men, but certainly happening. I've met plenty of gamer girls during my recent uni years who spent far more time at a PC or in front of a games...
  7. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    Perhaps it needs a rebrand after all this time. Just as with Athlon -> Phenom -> FX -> Ryzen. Radeon has a very long lineage at this point, which is both in its favor and against it. You have the established name, but also all the baggage that comes with failed products, and times that the...
  8. S

    Discussion Future ARM Cortex + Neoverse µArchs Discussion

    They wouldn't be the first to give up on Mali, tho I doubt it will be company wide - probably just for limited higher market segments like Dimensity 9000.
  9. S

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Be interesting to see areal density too. Given Bergamo was only a 1.33x increase in cores over Genoa and the Zen5 successor is supposed to be more like 1.5x there must be a significant difference in layout there too.
  10. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    Chiphell forum.
  11. S

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    @adroc_thurston Any idea if Zen5 has (Intel) AMX?
  12. S

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Dang gone it....... I got to learn that trick!
  13. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    Even if they don't manage a big shift in µArch over RDNA4 they are certainly overdue a major increase in ALUs over N31 to compete with nVidia without going crazy on clocks.
  14. S

    Discussion Apple Silicon SoC thread

    A couple of years yeah, and SME2 came about 14 months later.
  15. S

    Discussion Apple Silicon SoC thread

    What does "outer product matmul ISA" mean? Do you mean that SME was designed as a separate ISA from the main CPU core?
  16. S

    Discussion Apple Silicon SoC thread

    Dunno about SME, but SVE was developed first as an ARM/academic research effort, and then later with Fujitsu for the Fugaku/A64FX supercomputer CPU core into the SVE1 instruction set. The research instruction set was called Argon (like Neon or Helium): Here is a link to the original...
  17. S

    Discussion Apple Silicon SoC thread

    Are you saying that Cortex A5xx, 7xx and X cores do not even have it in their baseline IP despite it being part of the v9-A spec? ..... Huh, I was sure it would at least be in Neoverse V2 or V3, but I can't find any reference to it at all - which you would assume would be there if they wanted...
  18. S

    Discussion Apple Silicon SoC thread

    Not sure that AVX is directly comparable to SME, even though it has AI/ML type instructions. Intel's AMX sounds more like it fits the bill as a direct competitor to SME, I think I saw somewhere that it might be included in Zen5, which given the sheer amount of time it has been around isn't a...
  19. S

    Discussion Apple Silicon SoC thread

    Given the whole AI kick that the consumer electronics industry has been on it does seem especially strange for Mediatek to have disabled SME when they don't have the excuse of gimping their current SoC's to make future custom CPU core laden ones seem equal or better. I wonder if there is a...
  20. S

    Discussion Apple Silicon SoC thread

    That was my assumption also.
  21. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    See RedGamingTech is good for something 😅
  22. S

    Discussion Apple Silicon SoC thread

    Still a little hazy on that. PR way back implied that Nuvia wanted to design X core, but Qualcomm after acquiring them wanted Y core due to a difference in priorities a la Nuvia originally targeting servers for Phoenix. The question is, exactly how much change happened in the concept phase...
  23. S

    Discussion Apple Silicon SoC thread

    From what I understand SVE1 lacked various instructions for full functional parity to NEON, so there is little reason to implement it on consumer SoC's on its own.
  24. S

    Discussion Apple Silicon SoC thread

    Is SME even enabled on v9-A Snapdragon SoC's? Or any other consumer v9-A hardware for that matter.
  25. S

    Discussion Apple Silicon SoC thread

    For a lot of people this doesn't matter simply because Apple is never going to produce a Windows PC with their hardware.
  26. S

    Discussion Apple Silicon SoC thread

    I hope it has SVE2 also then. Up until now there has been no impetus for OSS to actually start playing with SVE2, especially if they already have comprehensive NEON code paths.
  27. S

    Discussion Apple Silicon SoC thread

    Wait wat? Is it v9-A compatible? Does it have SVE too?
  28. S

    Discussion Qualcomm Snapdragon Thread

    ELP is the internal terminology for the Cortex X cores. The X cores previous to Blackhawk were labeled Makalu-ELP and Hunter-ELP internally.
  29. S

    Discussion Qualcomm Snapdragon Thread

    Went back to that ARM rumor site and found something odd under Cortex X6: Implication seems to be a new core IP segment between X and A7xx starting with this 'Alto'. Not sure if this is just a bad translation or not.
  30. S

    Discussion Apple Silicon SoC thread

    Noooo it means DEEP core µArch 😂
  31. S

    Discussion Apple Silicon SoC thread

    Or they can go in the negative direction with sea trenches.
  32. S

    Discussion AMD's Future APU Gone ARM?

    Infra red metalenses will go some way to further reducing the footprint of the tracking sensor.
  33. S

    Discussion AMD's Future APU Gone ARM?

    From a realism POV it is the future sure, but in terms of acceptable performance I think as with RT in general PT is being pushed far earlier than the available hardware capabilities. This is the entire point in pushing DLSS for nVidia since Turing. Even then they are still denoising the heck...
  34. S

    Discussion AMD's Future APU Gone ARM?

    IMHO real time RT software techniques are still very much in flux as nVidia scrambles to make RT as viable as possible to game devs having stepped in it by pushing the change long before the hardware or software was truly ready for it. Knowing that I don't see how they could be truly future...
  35. S

    Discussion AMD's Future APU Gone ARM?

    Did it actually fail? Or did they just put it on R&D slowburn because AMD offered them the shorter path to a functional product? If this rumor is real I'm inclined to think the latter because they didn't just whip this up recently. After all, with AMD restricting what they can do with their...
  36. S

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Zen 5 is a CPU core µArch, not a product in of itself. I imagine there will be plenty Turin server and Strix + Kraken APU sales even if Granite Ridge doesn't do so well for them.
  37. S

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    Oh, I thought that something called a TAGE predictor replaced it.
  38. S

    Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

    You don't need it, but they did use a perceptron for branch prediction at one point for Zen2 or something?
  39. S

    Discussion RDNA4 + CDNA3 Architectures Thread

    Ooooof, case in point why consumer gfx cards and APUs are not likely to get HBM in the near future..... https://www.anandtech.com/show/21382/sk-hynixs-hbm-memory-supply-sold-out-through-2025
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