You sound like my 80- year old grandma, no offense.
I know your knowledge is usually very poor but I expected you know how to use google. I overestimated you again (last time you stated server market is bigger than smartphone market, when reality is smarphones are 7x bigger than servers). Here...
Are you kidding?
IPC is measured in GB5 from A7 up to A13. And now also A14.
IPC of Nuvia Phoenix is known if we take the lowest boundary of blue blob as minimum
Chief Apple architect Gerard Williams III is CEO in his Nuvia, he took a lot of people with him, also known fact
uarch of Apple...
Maybe you missed the part where Intel uses for L3 cache lower uncore frequency as well.
Maybe you missed the part where Apple big cores runs at 2.6 GHz, little cores at 1.8 GHz and GPU < 1 GHz, so L3 SLC cache also runs with some multiplier. Apple's L3 cache is shared with GPU and NPU as well...
Really? You don't know that you can get CPU performance via CPU simulation? You can basically run any code on the CPU model. It just takes more time of course. How do you think ARM optimized A78 for efficiency and X1 for high performance X1? They run simulations over night with hundreds of...
No offense, but you have no clue what you talking about here. Jim Keller said that CPU uarch need ground up design every 4 years and if possible every 2 years. Where did he get that? Wasn't he working at Apple's CPU design team? Yes, he was.
Another confirmation of A15 being BIG uarch change is...
Jeez, you are right. A14 has almost doubled GPU performance. That's the answer to people how doubted Apple can't replace Radeons. Not only replace, but Apple can outperform Radeons. If Apple will use HBM2 memory, they can use huge GPU without being bandwidth bottlenecked like Renoir. And Fujitsu...
So you claim that Epyc has 321.7 pts/GHz => higher IPC than Ice Lake. Show me at least 3 good reviews where they claim that Ice Lake has lower IPC than Zen2. AFAIK there is no such a crazy conclusion. Again, I admit that down clocked CPU, which Epyc @ 3.4 GHz and Renoir @ 4.2 are, can provide...
You claim that Renoir has 1254 pts @ 1.8 GHz ..... resulting in 697 pts/GHz. 16-core Ryzen 3950X has only 286 pts/GHz. So you claim that Renoir has 2.4x higher IPC? Really? Why AMD bother with Zen3 +15% IPC development when they can install Renoir everywhere and go 10-year vacation?
You claim...
Ok, I agree AMD is doing great today. But then what are those missing parts? AMD cannot solve missing AVX512 by adding more cores forever. Intel's next year Sapphire Rapids with DDR5 and chiplet/EMIB design will delete AMD's multicore advatage. And than what? Intel has AVX512 and new 8192-bit...
Nice analysis at RWT and I agree with #2 scenario: A14 is small IPC/uarch jump.
According to my IPC table the evolution of 4xALU Apple line up is like this:
A7 Cyclone .... first 4xALU ARM core on the world, 2013, same year as 4xALU Intel Haswell, IPC similar to Sandy Bridge
A8 Typhoon ...
OK, that means the lowest IPC uplift in Apple's history is real (5%).
On the other hand it's positive to have similarity with A10. Because A10 was the last 4xALU core and next A11 was completely new uarch with 6xALU (1st on the world). It looks like Apple has pattern of ground up uarch redesign...
Fair point. There is scheduler task shuffling and OS boost control in play. Nothing's perfect.
Problem is that people tried to say those Apple A13's +82% IPC advantage is due to different OS. Which is non-sense. I accept that Win10 can hurt performance by 8% in compare to Linux like in your...
I used 2.8 GHz for my IPC calculation ................... this means 11% IPC increase from A13.
But with 3 GHz and 1583 pts = 527 pts/GHz ........ this means 5% IPC increase only.
That would be the lowest IPC gain in Apple's history.The lowest IPC gain had A10 Hurricane core with only 8%...
People wanted to cheat. I remember one guy downclocked his x86 CPU to 2.6 GHz similar to Apple, probably boosted uncore and DDR mem to maximum and claimed score higher about +20% than my table. This is cheating. Apple core can also provide higher IPC at 1 GHz. GB database is full of tweaked and...
So Intel can develop CPU with double IPC to Comet Lake for 3 GHz but they don't want to? Jezeez, wake up man. Do you remember when Intel tried to enter tablet and smart phone market with Atom cores? What a disaster it was! In-order 2xALU core with half IPC with terrible power consumption in...
GB5 1583 pts is even more by 21 pts than my prediction where I used official data for 40% uplift from A12.
It looks like almost there is no need to change table data :D
But wait. What about the frequency?
Tweet says 2.99 GHz which too high............... this looks like fake.
L1 data cache...
You didn't see the V1 core presentation slides?
ARM takes severs seriously (development of X1/V1 core started back in 2016 when Softbank bought ARM).
It looks like V1 is the main ARM's frontal attack in servers while N1 was only guns pre-warming:
1st slide: +50% IPC over N1 (remember N1 core...
Norrod said that with Zen2 they were not able target all servers (meaning HPC segment). IIRC he said that Zen3 will change that and target 100% of servers. When I read between those lines I understand lack of AVX512 is the biggest problem in HPC. AMD can solve that by supporting AVX512 (maybe...
We do have 64-core ARM Graviton2 which destroyed 32c/64t AMD Zen1 Epyc Naples. Putting aside power consumption due to 14nm vs 7nm to be fair. The RAW performance of ARM cores is dangerous already. I have to admit that Zen2 Rome is better than N1 core based G2. But Zen1 was destroyed. Quite a big...
Actually Anandtech measured performance and power:
ARM Apple A13 @ 2.65 GHz has about 1330 pts in GB5 ST consuming 4.6 W
x86 AMD Ryzen 3950X @ 4.6 GHz has 1350 pts in GB5 ST consuming 19.4 W
So similar performance at more than 5x lower power consumption. ARM server can have 5x more cores...
Nuvia started in 2018 so to have CPU product in 2021 is pretty optimistic, I agree. On the other hand Gerard Williams had in his mind the Apple A15 which they started development in 2018. Basically Nuvia Phoenix is probably based on uarch similar to Apple A15 so this can speed up the development...
I agree. Under normal circumstances 12-15% IPC would be decent performance uplift. But from "completely new architecture" I would expect a much more. It looks like a fake results to me because I expect +40% in FPU heavy load from Zen 3. We have indirectly confirmed AVX512 for Zen 3 so there must...
Nuvia Phoenix CPU with Nvidia GPU running Windows on ARM will be probably best desktop gaming rig. With double IPC even in emulation it will outperform Intel gaming CPU easily.
Next MS Xbox can have Nuvia Phoenix CPU. Backward compatibility for old games is secured via emulation. Huge...
I agree. Embedded is still using 8-bit CPUs so it's kind of different world with higher priorities than raw performance. But ultra cheap ESP32 (32-bit dual core CPU with wifi antenna on-board for just 4$ is incredible) moved IoT to 32-bit so maybe we will see 64-bit devices soon. Maybe ESP will...
I specifically wrote CPU enthusiast. Not x86 enthusiast. When you want discuss the most powerful CPU you have to go outside x86 garden. For example Fujitsu A64FX with HMB memory and SVE matrix multiplication is number one in supercomputers. Beating Nvidia GPUs.
Which x86 CPU can beat Nvidia...
There are some mandatory requirements in ARM ISA. For example ARMv8.6 in combination with SVE makes matrix multiplication and Bfloat16 options mandatory. So it gets better in time as selecting the most useful instructions as new standard. Same is expected for ARMv9 (probably ARMv8.6 + SVE2 + TME...
CPU A: hundreds of pages discussing every bit of marketing slide about "unified L3 cache" and +15% IPC
CPU B: no discussion even marketing slides suggesting IPC to be more than +100% over Zen 2
I guess if AMD or Intel would release same slide with at least +100% IPC there would be 1000 pages...
So this mean the IPC is:
Ryzen 3900x @4.6 GHz has 523 pts .... 113.7 pts/GHz
Zen3 @ 5.0 GHz has 652.8 pts ............. 130.6 pts/GHz .... +14.9% IPC uplift
You have a thread for this. Do not infect other threads with these IPC posts. I am giving you a zero point warning as a courtesy. Do...
Lets see what the Geekbench5 score will be. I expect 1550 - 1600 pts @ 2.8 GHz in single thread which will outperform any today's desktops (Intel 10900K @ 5.3 GHz is around 1450 pts).
What performance would you suggest?
This is official Nuvia picture:
- at 4Watts is range 1750 pts up to 2200 pts
- at 4.5 Watts is range 1900 up to 2050 pts
- on N5P TSMC process 3.0 GHz is reasonable
The worst case scenario: 1750 pts @ 3 GHz = 1750 / 3 = 583 pts/GHz .... 2.04x higher IPC...
At Real World Tech forum is info about K12 uarch. Pretty interesting stuff and maybe hint how Zen3 uarch might look like.
K12:
4xALU + 1xBr (second Br is shared at 4th ALU) .... 5-wide integer (+25%)
3xAGU (1x Load, 1x Load/Store, 1x Store) ... +50% than Zen1, similar to Zen2
Zen 1&2:
4x ALU...
TOP42 IPC chart
New CPUs added:
Nuvia Phoenix:
Released official performance range in GB5 (about 2000 pts @4.5W) here
process node N5P TSMC -> estimated frequency 3.0 GHz
IPC about 2.41x Intel 9900K
uarch similar to Apple A15 (same chief architect Gerard Williams III.)
probably 8xALUs + 4xBr...
And when Apple moves to ARM here comes also Chinese ARM HiSilicon Kungpeng 920 into desktop:
- ATX board
- 8c/8t CPU Kungpeng 920 @ 2.6 GHz (ARMv8 - 64-bit, internal development, not using licensed Cortex)
- 4x DDR4 64 GB max
- PCIe 3.0 1x16 lanes, 1x4 lanes, 1x1 lane
- 6x SATA, USB 3.0
- LAN...
Fair point but few things to note:
- ARM Fujitsu A64FX has 2x 512-bit SVE SIMD units. And SVE/SVE2 is capable of 2048-bit. So it's just the beginning. Next Fujitsu's ARM CPU could be much bigger beast than current one (maybe 1024-bit SIMD width).
- GPGPU computing is NOT used in mobile devices...
I guess ARMv9 is just new marketing label for ARMv8.6 and it's not that big change like going 32-bit to 64-bit. All parts like SVE2+TME was introduced already, SVE HW exists too (Fujitsu A64FX). Because Apple A13 has some AMX support already the next A14 might be SVE2 ARMv9 ready. We will see...
Last year:
Last year everybody was laughing to ARM server attempts like Graviton1 based on weak A72.
Last year everybody was laughing to Apple's A13, saying it's fake benches and there is no way Apple will move to ARM.
This year:
This year ARM's 64-core server CPU Graviton2 based on A76...
Nice graph. But you have to take into account this:
TDP: ............. Rome 225W ............................... Graviton2 95-105W estimated ............ less than half
Clocks:...........Rome boost 3.2 GHz ................ Graviton2 2.5 GHz fixed clocks .......... G2 has 78% clock
IPC/PPC...
Yes. As usual. A78 and X1 was announced this Q2 and first silicon is expected in Q4'20 from HiSilicon Kirin 1000 and from Qualcomm SD875 in Q1'21. This means that A78/X1 SoC was taped out in mid 2019..... so this means ARM LLC fihished A78/X1 core designs quarter ahead? so Q1'19. Same with...
That's the major difference in philosophy. Intel releases ISA extension to screw AMD up and increase their monopoly in x86 world. But they forgot that ARM CPUs have a SVE vectors which is much more powerful extension including matrix multiplication. Japanese Fugaku supercomputer (CPU only) based...
Zen1 ......................... released 2017.
ARM Cortex A76 ..... released 2018 (used in Graviton2 and Altra).
A76 is an old, tiny and slow smart phone core! And yet it's destroying beefy Zen1 core designed for servers. And puts a lot of problem for Zen2 2019 Rome. No wonder that you and...
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